提交 f507e5c1 编写于 作者: L luotao1

update multi-threads UT

上级 37d1a668
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include "paddle/fluid/inference/analysis/analyzer.h" #include "paddle/fluid/inference/analysis/analyzer.h"
#include <string> #include <string>
#include <vector>
#include "paddle/fluid/inference/analysis/data_flow_graph_to_fluid_pass.h" #include "paddle/fluid/inference/analysis/data_flow_graph_to_fluid_pass.h"
#include "paddle/fluid/inference/analysis/dfg_graphviz_draw_pass.h" #include "paddle/fluid/inference/analysis/dfg_graphviz_draw_pass.h"
#include "paddle/fluid/inference/analysis/fluid_to_data_flow_graph_pass.h" #include "paddle/fluid/inference/analysis/fluid_to_data_flow_graph_pass.h"
...@@ -41,7 +42,7 @@ class DfgPassManagerImpl final : public DfgPassManager { ...@@ -41,7 +42,7 @@ class DfgPassManagerImpl final : public DfgPassManager {
public: public:
DfgPassManagerImpl() { DfgPassManagerImpl() {
// TODO(Superjomn) set the key with pass reprs. // TODO(Superjomn) set the key with pass reprs.
LOG(INFO) VLOG(3)
<< "-----------------------------------------------------------------"; << "-----------------------------------------------------------------";
if (FLAGS_IA_enable_ir) { if (FLAGS_IA_enable_ir) {
AddPass("fluid-to-ir-pass", new FluidToIrPass); AddPass("fluid-to-ir-pass", new FluidToIrPass);
...@@ -53,7 +54,7 @@ class DfgPassManagerImpl final : public DfgPassManager { ...@@ -53,7 +54,7 @@ class DfgPassManagerImpl final : public DfgPassManager {
if (!FLAGS_IA_output_storage_path.empty()) { if (!FLAGS_IA_output_storage_path.empty()) {
AddPass("model-store-pass", new ModelStorePass); AddPass("model-store-pass", new ModelStorePass);
} }
LOG(INFO) VLOG(3)
<< "-----------------------------------------------------------------"; << "-----------------------------------------------------------------";
} }
...@@ -112,7 +113,6 @@ void Analyzer::Run(Argument* argument) { ...@@ -112,7 +113,6 @@ void Analyzer::Run(Argument* argument) {
"mul_lstm_fuse_pass", "graph_viz_pass", // "mul_lstm_fuse_pass", "graph_viz_pass", //
"seq_concat_fc_fuse_pass", "graph_viz_pass", // "seq_concat_fc_fuse_pass", "graph_viz_pass", //
"fc_fuse_pass", "graph_viz_pass" // "fc_fuse_pass", "graph_viz_pass" //
})); }));
for (auto& x : data_) { for (auto& x : data_) {
......
...@@ -335,18 +335,14 @@ void TestDituRNNPrediction(bool use_analysis_and_activate_ir = false, ...@@ -335,18 +335,14 @@ void TestDituRNNPrediction(bool use_analysis_and_activate_ir = false,
} }
} }
// Directly infer with the original model. TEST(Analyzer, DituRNN) {
TEST(Analyzer, DituRNN_without_analysis) {
LOG(INFO) << "ditu rnn without analysis";
TestDituRNNPrediction(false, 1); TestDituRNNPrediction(false, 1);
TestDituRNNPrediction(false, 4); // multi-threads TestDituRNNPrediction(true, 1);
} }
// Inference with analysis and IR. The IR module will fuse some large kernels. TEST(Analyzer, DituRNN_multi_thread) {
TEST(Analyzer, DituRNN_with_analysis_with_IR) { TestDituRNNPrediction(false, 4);
LOG(INFO) << "ditu rnn with analysis and IR fuse"; TestDituRNNPrediction(true, 4);
TestDituRNNPrediction(true, 1);
TestDituRNNPrediction(true, 4); // multi-threads
} }
} // namespace analysis } // namespace analysis
......
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