未验证 提交 32bc8b88 编写于 作者: 张春乔 提交者: GitHub

[CodeStyle][CINN] ruff F401 and F403 in python/cinn (#55182)

Co-authored-by: NSigureMo <sigure.qaq@gmail.com>
上级 832d6516
......@@ -98,10 +98,6 @@ ignore = [
# Ignore unnecessary lambda in dy2st unittest test_lambda
"test/dygraph_to_static/test_lambda.py" = ["PLC3002"]
# Temporarily ignore CINN files, it will fix later
"python/cinn/**" = [
"F401",
"F403",
]
"test/cinn/**" = [
"F403",
]
......@@ -21,9 +21,172 @@ cuhfile = os.path.join(runtime_include_dir, "cinn_cuda_runtime_source.cuh")
if os.path.exists(cuhfile):
os.environ.setdefault('runtime_include_dir', runtime_include_dir)
from .core_api.common import *
from .core_api.backends import *
from .core_api.poly import *
from .core_api.ir import *
from .core_api.lang import *
from .common import ( # noqa: F401
BFloat16,
Bool,
CINNValue,
CINNValuePack,
DefaultHostTarget,
DefaultNVGPUTarget,
DefaultTarget,
Float,
Float16,
Int,
RefCount,
Shared_CINNValuePack_,
String,
Target,
Type,
UInt,
Void,
_CINNValuePack_,
get_target,
is_compiled_with_cuda,
is_compiled_with_cudnn,
make_const,
reset_name_id,
set_target,
type_of,
)
from .backends import ( # noqa: F401
Compiler,
ExecutionEngine,
ExecutionOptions,
)
from .poly import ( # noqa: F401
Condition,
Iterator,
SharedStage,
SharedStageMap,
Stage,
StageMap,
create_stages,
)
from .ir import ( # noqa: F401
Add,
And,
Args,
Argument,
BinaryOpNodeAdd,
BinaryOpNodeAnd,
BinaryOpNodeDiv,
BinaryOpNodeEQ,
BinaryOpNodeFracOp,
BinaryOpNodeGE,
BinaryOpNodeGT,
BinaryOpNodeLE,
BinaryOpNodeLT,
BinaryOpNodeMax,
BinaryOpNodeMin,
BinaryOpNodeMod,
BinaryOpNodeMul,
BinaryOpNodeNE,
BinaryOpNodeOr,
BinaryOpNodeSub,
Block,
Call,
CallOp,
CallType,
Cast,
ComputeOp,
Div,
EQ,
Expr,
ExprNodeAdd,
ExprNodeAnd,
ExprNodeBlock,
ExprNodeCall,
ExprNodeCast,
ExprNodeDiv,
ExprNodeEQ,
ExprNodeFloatImm,
ExprNodeFracOp,
ExprNodeGE,
ExprNodeGT,
ExprNodeIntImm,
ExprNodeLE,
ExprNodeLT,
ExprNodeLet,
ExprNodeLoad,
ExprNodeMax,
ExprNodeMin,
ExprNodeMinus,
ExprNodeMod,
ExprNodeMul,
ExprNodeNE,
ExprNodeNot,
ExprNodeOr,
ExprNodeProduct,
ExprNodeReduce,
ExprNodeSelect,
ExprNodeStore,
ExprNodeStringImm,
ExprNodeSub,
ExprNodeSum,
ExprNodeUIntImm,
ExprNode_Module_,
ExprNode_Tensor_,
ExprNode_Var_,
FloatImm,
FracOp,
GE,
GT,
IRVisitor,
IntImm,
IrNode,
IrNodeRef,
IrNodeTy,
LE,
LT,
Let,
Load,
LoadStoreAddrMnger,
LoweredFunc,
Max,
Min,
Minus,
Mod,
Mul,
NE,
Not,
Operation,
Or,
PackedFunc,
PlaceholderOp,
Product,
Reduce,
Registry,
Select,
SharedIrNode,
Store,
StringImm,
Sub,
Sum,
Tensor,
UIntImm,
UnaryOpNodeMinus,
UnaryOpNodeNot,
Var,
_Module_,
_Tensor_,
_Var_,
)
from .lang import ( # noqa: F401
Buffer,
Module,
Placeholder,
ReturnType,
call_extern,
call_lowered,
compute,
create_placeholder,
lower,
lower_vec,
reduce_all,
reduce_any,
reduce_max,
reduce_min,
reduce_mul,
reduce_sum,
)
from .version import full_version as __version__
......@@ -12,4 +12,8 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.backends import ExecutionEngine, ExecutionOptions
from .core_api.backends import ( # noqa: F401
Compiler,
ExecutionEngine,
ExecutionOptions,
)
......@@ -12,16 +12,30 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.common import *
from .core_api.common import (
from .core_api.common import ( # noqa: F401
BFloat16,
Bool,
CINNValue,
CINNValuePack,
DefaultHostTarget,
DefaultNVGPUTarget,
DefaultTarget,
Float,
Float16,
Int,
RefCount,
Shared_CINNValuePack_,
String,
Target,
Type,
UInt,
Void,
_CINNValuePack_,
get_target,
is_compiled_with_cuda,
is_compiled_with_cudnn,
make_const,
reset_name_id,
set_target,
type_of,
)
......@@ -12,4 +12,12 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.framework import *
from .core_api.framework import ( # noqa: F401
NodeAttr,
Operator,
OpValueType,
OpValueType1,
Scope,
SharedTensor,
Tensor,
)
......@@ -12,4 +12,16 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.frontend import *
from .core_api.frontend import ( # noqa: F401
Computation,
Instruction,
Interpreter,
NetBuilder,
PaddleModelConvertor,
Placeholder,
Program,
Variable,
get_default_graph_pass,
get_default_opfusion_pass,
get_default_program_pass,
)
......@@ -12,7 +12,115 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from ..core_api.ir import *
from ..core_api.ir import ( # noqa: F401
Add,
And,
Args,
Argument,
BinaryOpNodeAdd,
BinaryOpNodeAnd,
BinaryOpNodeDiv,
BinaryOpNodeEQ,
BinaryOpNodeFracOp,
BinaryOpNodeGE,
BinaryOpNodeGT,
BinaryOpNodeLE,
BinaryOpNodeLT,
BinaryOpNodeMax,
BinaryOpNodeMin,
BinaryOpNodeMod,
BinaryOpNodeMul,
BinaryOpNodeNE,
BinaryOpNodeOr,
BinaryOpNodeSub,
Block,
Call,
CallOp,
CallType,
Cast,
ComputeOp,
Div,
EQ,
Expr,
ExprNodeAdd,
ExprNodeAnd,
ExprNodeBlock,
ExprNodeCall,
ExprNodeCast,
ExprNodeDiv,
ExprNodeEQ,
ExprNodeFloatImm,
ExprNodeFracOp,
ExprNodeGE,
ExprNodeGT,
ExprNodeIntImm,
ExprNodeLE,
ExprNodeLT,
ExprNodeLet,
ExprNodeLoad,
ExprNodeMax,
ExprNodeMin,
ExprNodeMinus,
ExprNodeMod,
ExprNodeMul,
ExprNodeNE,
ExprNodeNot,
ExprNodeOr,
ExprNodeProduct,
ExprNodeReduce,
ExprNodeSelect,
ExprNodeStore,
ExprNodeStringImm,
ExprNodeSub,
ExprNodeSum,
ExprNodeUIntImm,
ExprNode_Module_,
ExprNode_Tensor_,
ExprNode_Var_,
FloatImm,
FracOp,
GE,
GT,
IRVisitor,
IntImm,
IrNode,
IrNodeRef,
IrNodeTy,
LE,
LT,
Let,
Load,
LoadStoreAddrMnger,
LoweredFunc,
Max,
Min,
Minus,
Mod,
Mul,
NE,
Not,
Operation,
Or,
PackedFunc,
PlaceholderOp,
Product,
Reduce,
Registry,
Select,
SharedIrNode,
Store,
StringImm,
Sub,
Sum,
Tensor,
UIntImm,
UnaryOpNodeMinus,
UnaryOpNodeNot,
Var,
_Module_,
_Tensor_,
_Var_,
)
def get_global_func(name):
......
......@@ -12,5 +12,21 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.lang import *
from .core_api.lang import Buffer, compute, lower
from .core_api.lang import ( # noqa: F401
Buffer,
Module,
Placeholder,
ReturnType,
call_extern,
call_lowered,
compute,
create_placeholder,
lower,
lower_vec,
reduce_all,
reduce_any,
reduce_max,
reduce_min,
reduce_mul,
reduce_sum,
)
......@@ -12,4 +12,4 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.optim import ir_copy, simplify
from .core_api.optim import ir_copy, simplify # noqa: F401
......@@ -12,4 +12,70 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.pe import *
from .core_api.pe import ( # noqa: F401
abs,
acos,
acosh,
add,
asin,
asinh,
atan,
atan2,
atanh,
bitwise_and,
bitwise_not,
bitwise_or,
bitwise_xor,
ceil,
cos,
cosh,
divide,
equal,
erf,
exp,
floor,
floor_divide,
greater,
greater_equal,
identity,
isfinite,
isinf,
isnan,
left_shift,
less,
less_equal,
log,
log2,
log10,
logical_and,
logical_not,
logical_or,
logical_xor,
matmul,
matmul_mkl,
max,
min,
mod,
multiply,
negative,
not_equal,
reduce_all,
reduce_any,
reduce_max,
reduce_min,
reduce_prod,
reduce_sum,
remainder,
right_shift,
round,
rsqrt,
sigmoid,
sign,
sin,
sinh,
sqrt,
subtract,
tan,
tanh,
trunc,
)
......@@ -12,4 +12,12 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.poly import create_stages
from .core_api.poly import ( # noqa: F401
Condition,
Iterator,
SharedStage,
SharedStageMap,
Stage,
StageMap,
create_stages,
)
......@@ -12,4 +12,57 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.runtime import *
from .core_api.runtime import ( # noqa: F401
VoidPointer,
cinn_arm_device,
cinn_bool_t,
cinn_buffer_copy,
cinn_buffer_copy_to_device,
cinn_buffer_copy_to_host,
cinn_buffer_free,
cinn_buffer_get_data_const_handle,
cinn_buffer_get_data_handle,
cinn_buffer_kind_t,
cinn_buffer_load_float32,
cinn_buffer_load_float64,
cinn_buffer_malloc,
cinn_buffer_on_device,
cinn_buffer_on_host,
cinn_buffer_t,
cinn_device_interface_t,
cinn_device_kind_t,
cinn_device_release,
cinn_device_sync,
cinn_float32_t,
cinn_float64_t,
cinn_int8_t,
cinn_int32_t,
cinn_int64_t,
cinn_opencl_device,
cinn_pod_value_t,
cinn_pod_value_to_buffer_p,
cinn_pod_value_to_double,
cinn_pod_value_to_float,
cinn_pod_value_to_int8,
cinn_pod_value_to_int32,
cinn_pod_value_to_int64,
cinn_pod_value_to_void_p,
cinn_type_code_t,
cinn_type_float,
cinn_type_handle,
cinn_type_int,
cinn_type_t,
cinn_type_uint,
cinn_type_unk,
cinn_uint32_t,
cinn_uint64_t,
cinn_unk_device,
cinn_unk_t,
cinn_value_t,
cinn_x86_device,
cinn_x86_device_interface,
clear_seed,
nullptr,
seed,
set_cinn_cudnn_deterministic,
)
......@@ -12,4 +12,19 @@
# See the License for the specific language governing permissions and
# limitations under the License.
from .core_api.utils import *
from .core_api.utils import ( # noqa: F401
EventType,
HostEvent,
HostEventRecorder,
ProfilerHelper,
kCodeGen,
kCompile,
kCompute,
kFusePass,
kGraph,
kInstruction,
kOptimize,
kOrdinary,
kProgram,
kSchedule,
)
......@@ -13,6 +13,6 @@
# limitations under the License.
try:
from .info import *
from .info import * # noqa: F403
except:
full_version = 'Unknown'
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