squeeze_kernel.cc 4.2 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
// Copyright (c) 2022 PaddlePaddle Authors. All Rights Reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

#include "paddle/phi/kernels/squeeze_kernel.h"

#include "paddle/phi/backends/all_context.h"
#include "paddle/phi/core/kernel_registry.h"
#include "paddle/phi/core/tensor_utils.h"
#include "paddle/phi/kernels/funcs/unsqueeze.h"

namespace phi {
template <typename T, typename Context>
24 25 26 27
void SqueezeInferKernel(const Context& dev_ctx,
                        const DenseTensor& x,
                        const IntArray& axes,
                        DenseTensor* out) {
H
heliqi 已提交
28
  auto out_dims = out->dims();
29 30 31 32 33 34
  dev_ctx.template Alloc<T>(out);
  phi::Copy(dev_ctx, x, dev_ctx.GetPlace(), false, out);
  out->Resize(out_dims);  // copy will reset the dims.
}

template <typename T, typename Context>
35 36 37 38 39 40
void SqueezeKernel(const Context& dev_ctx,
                   const DenseTensor& x,
                   const IntArray& axes,
                   DenseTensor* out,
                   DenseTensor* xshape) {
  SqueezeInferKernel<T, Context>(dev_ctx, x, axes, out);
41 42 43 44
}

}  // namespace phi

45
PD_REGISTER_KERNEL(squeeze_infer,
46 47
                   CPU,
                   ALL_LAYOUT,
48
                   phi::SqueezeInferKernel,
49 50 51 52 53 54 55 56 57 58 59
                   float,
                   double,
                   phi::dtype::bfloat16,
                   bool,
                   int,
                   uint8_t,
                   int8_t,
                   int64_t,
                   phi::dtype::complex<float>,
                   phi::dtype::complex<double>) {}

60
PD_REGISTER_KERNEL(squeeze,
61 62
                   CPU,
                   ALL_LAYOUT,
63
                   phi::SqueezeKernel,
64 65 66 67 68 69 70 71 72 73 74
                   float,
                   double,
                   phi::dtype::bfloat16,
                   bool,
                   int,
                   uint8_t,
                   int8_t,
                   int64_t,
                   phi::dtype::complex<float>,
                   phi::dtype::complex<double>) {}
#if defined(PADDLE_WITH_CUDA) || defined(PADDLE_WITH_HIP)
75
PD_REGISTER_KERNEL(squeeze_infer,
76 77
                   GPU,
                   ALL_LAYOUT,
78
                   phi::SqueezeInferKernel,
79 80 81 82 83 84 85 86 87 88 89 90
                   float,
                   double,
                   phi::dtype::float16,
                   phi::dtype::bfloat16,
                   bool,
                   int,
                   uint8_t,
                   int8_t,
                   int64_t,
                   phi::dtype::complex<float>,
                   phi::dtype::complex<double>) {}

91
PD_REGISTER_KERNEL(squeeze,
92 93
                   GPU,
                   ALL_LAYOUT,
94
                   phi::SqueezeKernel,
95 96 97 98 99 100 101 102 103 104 105 106 107 108
                   float,
                   double,
                   phi::dtype::float16,
                   phi::dtype::bfloat16,
                   bool,
                   int,
                   uint8_t,
                   int8_t,
                   int64_t,
                   phi::dtype::complex<float>,
                   phi::dtype::complex<double>) {}
#endif

#ifdef PADDLE_WITH_XPU
109
PD_REGISTER_KERNEL(squeeze_infer,
110 111
                   XPU,
                   ALL_LAYOUT,
112
                   phi::SqueezeInferKernel,
113 114 115 116 117 118 119 120 121
                   float,
                   double,
                   phi::dtype::float16,
                   bool,
                   int,
                   uint8_t,
                   int8_t,
                   int64_t) {}

122
PD_REGISTER_KERNEL(squeeze,
123 124
                   XPU,
                   ALL_LAYOUT,
125
                   phi::SqueezeKernel,
126 127 128 129 130 131 132 133 134
                   float,
                   double,
                   phi::dtype::float16,
                   bool,
                   int,
                   uint8_t,
                   int8_t,
                   int64_t) {}
#endif