- 21 9月, 2020 1 次提交
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由 zhupengyang 提交于
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- 23 7月, 2020 1 次提交
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由 huzhiqiang 提交于
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- 15 6月, 2020 1 次提交
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由 HappyAngel 提交于
* fix: winograd support unsame pad test=develop * feat: add winograd int8 kernel test=develop * fix: style fix test=develo * fix winograd_int8 ut sgement default. test=develop * close basic_test, test=develop Co-authored-by: NMyPandaShaoxiang <txg4794@163.com>
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- 04 2月, 2020 1 次提交
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由 yiicy 提交于
* refactor 5x5s1 dw conv armv8, test=develop * [ARM] refactor depthwise conv 5x5s1, and support relu6, leakey relu, test=develop * [ARM] sgemv support fuse relu6 and leakey relu,test=develop * [ARM] reduce some conv ut case, test=develop * [ARM] fix 5x5dw conv pick kernel bug, test=develop * fix code style, test=develop * [ARM] fix sgemv fuse relu6 bug, test=develop * [ARM] fix fp32 5x5s1 dw bug, test=develop * [ARM] fix fp32 5x5 dw conv pick kernel bug, test=develop
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- 04 12月, 2019 1 次提交
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由 石晓伟 提交于
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- 22 11月, 2019 1 次提交
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由 yiicy 提交于
* unfinish sgemmc4 * finish armv8 sgemmc4 * arm add sgemmc4 with deal with remain * [ARM] add sgemmc4 small kernel, test=develop
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- 20 11月, 2019 1 次提交
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由 yiicy 提交于
* [ARM] sgemv support transA, test=develop * add sgemv ut, test=develop
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