- 03 6月, 2020 1 次提交
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由 yiicy 提交于
int8 direct_conv, dw_conv add relu6 and leaky relu fusion
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- 01 6月, 2020 1 次提交
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由 HappyAngel 提交于
* improve 3x3s1 direct profile * add gemv+relu6/lleakyRelu * fix relu6 problem, test=develop * fix format, test=develop * add six / scale , test=develop
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- 28 5月, 2020 1 次提交
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由 T8T9 提交于
* reduce .so size. test=develop * compile all targets when LITE_ON_TINY_PUBLISH=OFF * unordered_map is more convenient when key is customized class * test=develop
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- 26 5月, 2020 1 次提交
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由 HappyAngel 提交于
* fix pooling bug and speed * add 2x2s2p1 pooling. test=develop * fix conflict, test=develop
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- 24 4月, 2020 1 次提交
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由 HappyAngel 提交于
* add scale+relu/relu6/leakyrelu test=develop * fix format, test=develop
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- 21 4月, 2020 2 次提交
- 20 4月, 2020 2 次提交
- 14 4月, 2020 1 次提交
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由 xiaogang 提交于
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- 13 4月, 2020 1 次提交
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由 cc 提交于
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- 08 4月, 2020 1 次提交
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由 cc 提交于
* Add hard_swish, ctc_align and reciprocal op, test=develop * Move some activation ops to extra, test=develop
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- 27 3月, 2020 1 次提交
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由 mapingshuo 提交于
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- 23 3月, 2020 2 次提交
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由 HappyAngel 提交于
* fxi ff, test=develop * delete bgr_flip, test=develop
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由 xiaogang 提交于
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- 16 3月, 2020 2 次提交
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由 Yuan Shuai 提交于
* [LITE][OPENCL] Change fp32 fc to fp16's. test=develop * fix act in conv3x3opt opencl kernel. test=develop * [LITE][ARM] comment assembly of layout armv7 cpu. test=develop
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由 mapingshuo 提交于
* add backend * add kernel * add grad kernel
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- 14 3月, 2020 2 次提交
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由 HappyAngel 提交于
* improve conv_dw profile with rel relu6 leakyrelu, test=develop * add depthwise, test=develop * fix ci error, test=develop * fix cv demo print, test=develop
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由 yiicy 提交于
* [ARM] improve sgemm performance with relu, relu6 and leakey relu, test=develop * [ARM] improve sgemm performance with relu, relu6 and leakey relu, test=develop
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- 13 3月, 2020 1 次提交
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由 HappyAngel 提交于
* fix clang v7 error * change ut, test=develop * fix conv ut, test=develop
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- 09 3月, 2020 1 次提交
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由 HappyAngel 提交于
* set arm_lang default is off. test=develop * fix resize error, test-develop
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- 06 3月, 2020 1 次提交
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由 xiaogang 提交于
* fix: fix nlp ops input and output type * fix: add elementwise x_dims>y_dims case
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- 05 3月, 2020 1 次提交
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由 xiaogang 提交于
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- 04 3月, 2020 2 次提交
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由 zhupengyang 提交于
* scale support int32 input
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由 HappyAngel 提交于
* add grid sampler * reset act * fix conflict and readme, test=develop * fix ios v8 run error * fix grid_sampler compute error. test=develop * fix exp act run error, test=develop * fix format, test=develop
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- 28 2月, 2020 1 次提交
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由 mapingshuo 提交于
* add sequence_conv op and arm kernel * add test, test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * test=develop * modify code style. test=develop * fix ut, test=develop * delete unused code, test=develop
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- 27 2月, 2020 1 次提交
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由 xiaogang 提交于
* feat: add lstm op && kernel test=develop
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- 24 2月, 2020 1 次提交
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由 cc 提交于
* Support lac model, fix bug for argmax lod_reset, test=develop
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- 22 2月, 2020 1 次提交
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由 HappyAngel 提交于
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- 20 2月, 2020 1 次提交
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由 HappyAngel 提交于
* fix caliberate error, values from [-128, 127] to [-127, 127], test=develop * add classify demo and detection demo, test=develop
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- 18 2月, 2020 1 次提交
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由 yiicy 提交于
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- 12 2月, 2020 3 次提交
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由 HappyAngel 提交于
* fix con+relu6/leakyRelu fusion in Fp32, test=develop * note m=397 in sgemv_int8 ut, test=develop * fix ios build error. test=develop
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由 xiaogang 提交于
fix conv_winograd multithreads bug
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由 yiicy 提交于
* [ARM] add 5x5s2 depthwise conv armv8 impl, test=develop * [ARM] add int8 5x5s2 dw conv armv7 impl, test=develop * [ARM] add int8 5x5s2 dw conv impl, test=develop * [ARM] close int8 conv ut, test=develop
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- 05 2月, 2020 1 次提交
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由 HappyAngel 提交于
[arm] fix conv_dw leakyRelu compute error
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- 04 2月, 2020 1 次提交
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由 yiicy 提交于
* refactor 5x5s1 dw conv armv8, test=develop * [ARM] refactor depthwise conv 5x5s1, and support relu6, leakey relu, test=develop * [ARM] sgemv support fuse relu6 and leakey relu,test=develop * [ARM] reduce some conv ut case, test=develop * [ARM] fix 5x5dw conv pick kernel bug, test=develop * fix code style, test=develop * [ARM] fix sgemv fuse relu6 bug, test=develop * [ARM] fix fp32 5x5s1 dw bug, test=develop * [ARM] fix fp32 5x5 dw conv pick kernel bug, test=develop
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- 19 1月, 2020 1 次提交
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由 HappyAngel 提交于
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- 17 1月, 2020 1 次提交
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由 xiaogang 提交于
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- 16 1月, 2020 1 次提交
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由 HappyAngel 提交于
1. add conv_5x5s2_dw to support any padding 2. add 1x1s2pooling impl 3. fix conv dw 3x3 s1p01 bug
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- 15 1月, 2020 1 次提交
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由 HappyAngel 提交于
* fix, test=develop * add fc_relu, test=develop
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