- 17 9月, 2019 1 次提交
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由 juncaipeng 提交于
* fix yolo_box bug, test=develop * fix test bug for yolo_box, test=develop
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- 16 9月, 2019 2 次提交
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由 lhl960107 提交于
* add x86 gru&&relu&&sequence_expand_as op test=develop
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由 Xiaoyang LI 提交于
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- 12 9月, 2019 4 次提交
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由 zhupengyang 提交于
fix bilinear-interp unit test for more cases test=develop
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由 huzhiqiang 提交于
add math function: lstm and selected_rows into lite/x86/math add selected_rows and rw_lock into lite/fluid add lstm_cpu_kernel and lstm_kernel into lite/x86/detail
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由 Wilber 提交于
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由 Wilber 提交于
add transpose kernel for cuda
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- 11 9月, 2019 1 次提交
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由 石晓伟 提交于
* make passes related to the device type, test=develop * improve tips, test=develop
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- 10 9月, 2019 3 次提交
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由 lijianshe02 提交于
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由 Wilber 提交于
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由 TianXiaogang 提交于
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- 09 9月, 2019 1 次提交
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由 juncaipeng 提交于
* add assign_value op, arm kernel and test, add fluid_type, test=develop * add hard_sigmoid, test=develop
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- 07 9月, 2019 1 次提交
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由 lijianshe02 提交于
* add lite x86 ops for ASR test=develop * add lite x86 ops for ASR test=develop * fix x86 ci run test problems test=develop * fix mkl path for CI test=develop
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- 06 9月, 2019 2 次提交
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由 Wilber 提交于
* modify slice op and add slice test * modify nearest_polate when align_corners=false (bugfix)
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由 Zhaolong Xing 提交于
* paddle lite cuda init can run model with leaky_relu * add the missing file. test=develop * add the load from memory interface. test=develop * refine this pr. fix comments fix ci error test=develop * conv impl fp32: conv, conv+bais, conv+bias+relu, conv+bias+leaky_relu int8: conv, conv+bais+relu(int8 or fp32 output), conv+bias+leaky_relu(int8 or fp32 output) can run conv+ bias+relu using cxx_api test=develop * move the lite/cuda/math to backends/cuda/math test=develop
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- 04 9月, 2019 1 次提交
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由 Wilber 提交于
* modify slice op and add slice test * modify slice op bug
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- 03 9月, 2019 2 次提交
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由 huzhiqiang 提交于
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由 huzhiqiang 提交于
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