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f5cc72dc
编写于
8月 10, 2018
作者:
S
smilejames
提交者:
GitHub
8月 10, 2018
浏览文件
操作
浏览文件
下载
差异文件
Merge branch 'develop' into develop
上级
7eaf8451
9f30eab4
变更
13
隐藏空白更改
内联
并排
Showing
13 changed file
with
45 addition
and
20 deletion
+45
-20
src/common/enforce.h
src/common/enforce.h
+8
-1
src/io/api.cc
src/io/api.cc
+1
-0
src/operators/feed_op.h
src/operators/feed_op.h
+1
-0
src/operators/fetch_op.cpp
src/operators/fetch_op.cpp
+1
-0
src/operators/fetch_op.h
src/operators/fetch_op.h
+1
-0
src/operators/kernel/central-arm-func/conv_add_relu_arm_func.h
...perators/kernel/central-arm-func/conv_add_relu_arm_func.h
+0
-5
src/operators/kernel/central-arm-func/conv_arm_func.h
src/operators/kernel/central-arm-func/conv_arm_func.h
+1
-2
src/operators/kernel/central-arm-func/mul_arm_func.h
src/operators/kernel/central-arm-func/mul_arm_func.h
+1
-2
src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp
src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp
+3
-3
src/operators/kernel/fpga/fc_relu_kernel.cpp
src/operators/kernel/fpga/fc_relu_kernel.cpp
+2
-2
src/operators/kernel/fpga/fusion_fc_kernel.cpp
src/operators/kernel/fpga/fusion_fc_kernel.cpp
+2
-2
src/operators/kernel/fpga/pool_kernel.cpp
src/operators/kernel/fpga/pool_kernel.cpp
+2
-2
src/operators/math/gemm.cpp
src/operators/math/gemm.cpp
+22
-1
未找到文件。
src/common/enforce.h
浏览文件 @
f5cc72dc
...
...
@@ -61,7 +61,14 @@ struct PaddleMobileException : public std::exception {
}
#else
#define PADDLE_MOBILE_THROW_EXCEPTION(...)
#define PADDLE_MOBILE_ENFORCE(stat, ...)
#define PADDLE_MOBILE_ENFORCE(stat, ...) \
{ \
if (stat) { \
} else { \
} \
}
#endif
}
// namespace paddle_mobile
src/io/api.cc
浏览文件 @
f5cc72dc
...
...
@@ -12,6 +12,7 @@ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License. */
#include "cstring"
#include "io/paddle_inference_api.h"
namespace
paddle_mobile
{
...
...
src/operators/feed_op.h
浏览文件 @
f5cc72dc
...
...
@@ -74,4 +74,5 @@ USE_OP_CPU(feed);
USE_OP_MALI_GPU
(
feed
);
#endif
#ifdef PADDLE_MOBILE_FPGA
USE_OP_FPGA
(
feed
);
#endif
src/operators/fetch_op.cpp
浏览文件 @
f5cc72dc
...
...
@@ -25,4 +25,5 @@ REGISTER_OPERATOR_CPU(fetch, ops::FetchOp);
REGISTER_OPERATOR_MALI_GPU
(
fetch
,
ops
::
FetchOp
);
#endif
#ifdef PADDLE_MOBILE_FPGA
REGISTER_OPERATOR_FPGA
(
fetch
,
ops
::
FetchOp
);
#endif
src/operators/fetch_op.h
浏览文件 @
f5cc72dc
...
...
@@ -54,4 +54,5 @@ USE_OP_CPU(fetch);
USE_OP_MALI_GPU
(
fetch
);
#endif
#ifdef PADDLE_MOBILE_FPGA
USE_OP_FPGA
(
fetch
);
#endif
src/operators/kernel/central-arm-func/conv_add_relu_arm_func.h
浏览文件 @
f5cc72dc
...
...
@@ -32,12 +32,7 @@ void ConvAddReluCompute(const FusionConvAddReluParam ¶m) {
Tensor
bias
=
*
param
.
Bias
();
int
axis
=
param
.
Axis
();
Tensor
*
output
=
param
.
Output
();
// math::expand_bias(bias, axis, output->dims());
float
*
output_data
=
output
->
data
<
float
>
();
float
*
biase_data
=
bias
.
data
<
float
>
();
// for (int k = 0; k < output->numel(); ++k) {
// output_data[k] = biase_data[k];
// }
int
groups
=
param
.
Groups
();
std
::
vector
<
int
>
strides
=
param
.
Strides
();
...
...
src/operators/kernel/central-arm-func/conv_arm_func.h
浏览文件 @
f5cc72dc
...
...
@@ -30,7 +30,6 @@ inline void ConvBasic(const ConvParam ¶m) {
Tensor
filter
=
*
param
.
Filter
();
Tensor
*
output
=
param
.
Output
();
output
->
mutable_data
<
float
>
();
float
*
bias_data
=
output
->
mutable_data
<
float
>
();
int
groups
=
param
.
Groups
();
std
::
vector
<
int
>
strides
=
param
.
Strides
();
std
::
vector
<
int
>
paddings
=
param
.
Paddings
();
...
...
@@ -107,7 +106,7 @@ inline void ConvBasic(const ConvParam ¶m) {
Tensor
filter_slice
=
filter
.
Slice
(
g
*
out_step
,
(
g
+
1
)
*
out_step
);
math
::
matmul
<
float
>
(
filter_slice
,
false
,
col_matrix
,
false
,
static_cast
<
float
>
(
1
),
&
out_slice
,
static_cast
<
float
>
(
0
)
,
false
,
bias_data
);
static_cast
<
float
>
(
0
));
}
}
}
...
...
src/operators/kernel/central-arm-func/mul_arm_func.h
浏览文件 @
f5cc72dc
...
...
@@ -59,7 +59,6 @@ void MulCompute(const MulParam ¶m) {
const
Tensor
*
input_y
=
param
.
InputY
();
Tensor
*
out
=
param
.
Out
();
out
->
mutable_data
<
float
>
();
float
*
bias_data
=
out
->
mutable_data
<
float
>
();
const
Tensor
x_matrix
=
input_x
->
dims
().
size
()
>
2
?
framework
::
ReshapeToMatrix
(
*
input_x
,
param
.
XNumColDims
())
...
...
@@ -73,7 +72,7 @@ void MulCompute(const MulParam ¶m) {
out
->
Resize
({
x_matrix
.
dims
()[
0
],
y_matrix
.
dims
()[
1
]});
}
math
::
matmul
<
float
>
(
x_matrix
,
false
,
y_matrix
,
false
,
static_cast
<
float
>
(
1
),
out
,
static_cast
<
float
>
(
0
)
,
false
,
bias_data
);
out
,
static_cast
<
float
>
(
0
));
if
(
out_dim
.
size
()
!=
2
)
{
out
->
Resize
(
out_dim
);
}
...
...
src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp
浏览文件 @
f5cc72dc
...
...
@@ -25,9 +25,9 @@ bool ElementwiseAddReluKernel<FPGA, float>::Init(
const
Tensor
*
input_x
=
param
->
InputX
();
const
Tensor
*
input_y
=
param
->
InputY
();
Tensor
*
out
=
param
->
Out
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
auto
out_ptr
=
out
->
mutable_data
<
float
>
();
auto
input_x_ptr
=
input_x
->
data
<
half
>
();
auto
input_y_ptr
=
input_y
->
data
<
half
>
();
auto
out_ptr
=
out
->
mutable_data
<
half
>
();
fpga
::
EWAddArgs
ewaddArgs
;
ewaddArgs
.
relu_enabled
=
relu_enabled
;
...
...
src/operators/kernel/fpga/fc_relu_kernel.cpp
浏览文件 @
f5cc72dc
...
...
@@ -22,13 +22,13 @@ template <>
bool
FusionFcReluKernel
<
FPGA
,
float
>::
Init
(
FusionFcReluParam
*
param
)
{
bool
relu_enabled
=
true
;
const
Tensor
*
input_x
=
param
->
InputX
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
auto
input_x_ptr
=
input_x
->
data
<
half
>
();
const
Tensor
*
input_y
=
param
->
InputY
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
const
Tensor
*
input_z
=
param
->
InputZ
();
auto
input_z_ptr
=
input_z
->
data
<
float
>
();
Tensor
*
out
=
param
->
Out
();
auto
out_ptr
=
out
->
mutable_data
<
float
>
();
auto
out_ptr
=
out
->
mutable_data
<
half
>
();
PADDLE_MOBILE_ENFORCE
(
input_x
->
dims
()[
1
]
==
input_y
->
dims
()[
0
],
"Image channel should be equal to weight number"
);
...
...
src/operators/kernel/fpga/fusion_fc_kernel.cpp
浏览文件 @
f5cc72dc
...
...
@@ -22,13 +22,13 @@ template <>
bool
FusionFcKernel
<
FPGA
,
float
>::
Init
(
FusionFcParam
*
param
)
{
bool
relu_enabled
=
false
;
const
Tensor
*
input_x
=
param
->
InputX
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
auto
input_x_ptr
=
input_x
->
data
<
half
>
();
const
Tensor
*
input_y
=
param
->
InputY
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
const
Tensor
*
input_z
=
param
->
InputZ
();
auto
input_z_ptr
=
input_z
->
data
<
float
>
();
Tensor
*
out
=
param
->
Out
();
auto
out_ptr
=
out
->
mutable_data
<
float
>
();
auto
out_ptr
=
out
->
mutable_data
<
half
>
();
PADDLE_MOBILE_ENFORCE
(
input_x
->
dims
()[
1
]
==
input_y
->
dims
()[
0
],
"Image channel should be equal to weight number"
);
...
...
src/operators/kernel/fpga/pool_kernel.cpp
浏览文件 @
f5cc72dc
...
...
@@ -22,9 +22,9 @@ namespace operators {
template
<
>
bool
PoolKernel
<
FPGA
,
float
>::
Init
(
PoolParam
*
param
)
{
const
Tensor
*
input
=
param
->
Input
();
auto
input_ptr
=
input
->
data
<
float
>
();
auto
input_ptr
=
input
->
data
<
half
>
();
Tensor
*
output
=
param
->
Output
();
auto
output_ptr
=
output
->
mutable_data
<
float
>
();
auto
output_ptr
=
output
->
mutable_data
<
half
>
();
vector
<
int
>
ksize
=
param
->
Ksize
();
vector
<
int
>
strides
=
param
->
Strides
();
vector
<
int
>
paddings
=
param
->
Paddings
();
...
...
src/operators/math/gemm.cpp
浏览文件 @
f5cc72dc
...
...
@@ -373,9 +373,9 @@ void InnerKernel(int mc, int nc, float alpha, const float *a, const float *b,
#endif
}
}
if
(
alpha
!=
1
)
{
WriteWithAlphaBeta
(
mc
,
nc
,
c
,
C
,
ldc
);
return
;
}
if
(
beta
==
0
)
{
...
...
@@ -2244,6 +2244,27 @@ void AddDot4x4(int k, const float *a, const float *b, float *c, int ldc) {
}
}
void
AddDot4x8
(
int
k
,
const
float
*
a
,
const
float
*
b
,
float
*
c
,
int
ldc
)
{}
void
WriteBasic
(
int
mc
,
int
nc
,
float
*
c
,
float
*
C
,
int
ldc
)
{}
void
WriteWithAlphaBeta
(
int
mc
,
int
nc
,
float
*
c
,
float
*
C
,
int
ldc
)
{}
void
WriteWithAdd
(
int
mc
,
int
nc
,
float
*
c
,
float
*
C
,
int
ldc
)
{}
void
WriteWithAddV1
(
int
mc
,
int
nc
,
float
*
c
,
float
*
C
,
int
ldc
,
float
*
bias
)
{}
void
WriteWithAddRelu
(
int
mc
,
int
nc
,
float
*
c
,
float
*
C
,
int
ldc
)
{}
void
WriteWithAddReluV1
(
int
mc
,
int
nc
,
float
*
c
,
float
*
C
,
int
ldc
,
float
*
bias
)
{}
void
WriteWithBn
(
int
mc
,
int
nc
,
float
*
c
,
float
*
C
,
int
ldc
,
float
*
new_scale
,
float
*
new_bias
)
{}
void
WriteWithBnRelu
(
int
mc
,
int
nc
,
float
*
c
,
float
*
C
,
int
ldc
,
float
*
new_scale
,
float
*
new_bias
)
{}
#endif // __ARM_NEON
// 32位 float 矩阵乘法
...
...
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