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df39bc5f
编写于
3月 14, 2020
作者:
C
chenjiaoAngel
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
fix conv_dw
上级
67c967c5
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
212 addition
and
60 deletion
+212
-60
lite/backends/arm/math/CMakeLists.txt
lite/backends/arm/math/CMakeLists.txt
+2
-0
lite/backends/arm/math/conv3x3s1p01_depthwise_fp32.cc
lite/backends/arm/math/conv3x3s1p01_depthwise_fp32.cc
+105
-30
lite/backends/arm/math/conv3x3s2p01_depthwise_fp32.cc
lite/backends/arm/math/conv3x3s2p01_depthwise_fp32.cc
+105
-30
未找到文件。
lite/backends/arm/math/CMakeLists.txt
浏览文件 @
df39bc5f
...
...
@@ -68,6 +68,8 @@ if (NOT HAS_ARM_MATH_LIB_DIR)
gemv_arm_int8.cc
conv3x3s1_direct_fp32.cc
conv3x3s2_direct_fp32.cc
conv3x3s1p01_depthwise_fp32_relu.cc
conv3x3s2p01_depthwise_fp32_relu.cc
conv3x3s1p01_depthwise_fp32.cc
conv3x3s2p01_depthwise_fp32.cc
conv3x3s1px_depthwise_fp32.cc
...
...
lite/backends/arm/math/conv3x3s1p01_depthwise_fp32.cc
浏览文件 @
df39bc5f
...
...
@@ -14,6 +14,7 @@
#include <arm_neon.h>
#include "lite/backends/arm/math/conv_depthwise.h"
#inlcude "lite/backends/arm/math/conv3x3s1p01_depthwise_fp32_relu.cc"
namespace
paddle
{
namespace
lite
{
...
...
@@ -91,23 +92,20 @@ void conv_depthwise_3x3s1_fp32(const float *din,
bool
flag_bias
,
const
operators
::
ActivationParam
act_param
,
ARMContext
*
ctx
)
{
bool
has_active
=
act_param
.
has_active
;
bool
flag_relu
=
false
;
bool
relu6
=
false
;
if
(
has_active
)
{
if
(
act_param
.
active_type
==
lite_api
::
ActivationType
::
kRelu
)
{
flag_relu
=
true
;
}
else
{
relu6
=
true
;
}
}
if
(
pad
==
0
)
{
if
(
w_in
>
5
)
{
conv_depthwise_3x3s1p0_bias
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s1p0_bias_s
(
dout
,
if
(
relu6
)
{
conv_depthwise_3x3s1p0_bias
(
dout
,
din
,
weights
,
bias
,
...
...
@@ -120,25 +118,57 @@ void conv_depthwise_3x3s1_fp32(const float *din,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s1p0_bias_relu
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
flag_relu
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
ctx
);
}
}
else
{
if
(
relu6
)
{
conv_depthwise_3x3s1p0_bias_s
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s1p0_bias_s_relu
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
flag_relu
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
ctx
);
}
}
}
if
(
pad
==
1
)
{
if
(
w_in
>
4
)
{
conv_depthwise_3x3s1p1_bias
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s1p1_bias_s
(
dout
,
if
(
relu6
)
{
conv_depthwise_3x3s1p1_bias
(
dout
,
din
,
weights
,
bias
,
...
...
@@ -151,6 +181,51 @@ void conv_depthwise_3x3s1_fp32(const float *din,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s1p1_bias_relu
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
flag_relu
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
ctx
);
}
}
else
{
if
(
relu6
)
{
conv_depthwise_3x3s1p1_bias_s
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s1p1_bias_s_relu
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
flag_relu
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
ctx
);
}
}
}
}
...
...
lite/backends/arm/math/conv3x3s2p01_depthwise_fp32.cc
浏览文件 @
df39bc5f
...
...
@@ -15,6 +15,7 @@
#include <arm_neon.h>
#include "lite/backends/arm/math/conv_block_utils.h"
#include "lite/backends/arm/math/conv_depthwise.h"
#inlcude "lite/backends/arm/math/conv3x3s2p01_depthwise_fp32_relu.cc"
namespace
paddle
{
namespace
lite
{
...
...
@@ -91,23 +92,20 @@ void conv_depthwise_3x3s2_fp32(const float* din,
bool
flag_bias
,
const
operators
::
ActivationParam
act_param
,
ARMContext
*
ctx
)
{
bool
has_active
=
act_param
.
has_active
;
bool
flag_relu
=
false
;
bool
relu6
=
false
;
if
(
has_active
)
{
if
(
act_param
.
active_type
==
lite_api
::
ActivationType
::
kRelu
)
{
flag_relu
=
true
;
}
else
{
relu6
=
true
;
}
}
if
(
pad
==
0
)
{
if
(
w_in
>
8
)
{
conv_depthwise_3x3s2p0_bias
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s2p0_bias_s
(
dout
,
if
(
relu6
)
{
conv_depthwise_3x3s2p0_bias
(
dout
,
din
,
weights
,
bias
,
...
...
@@ -120,25 +118,57 @@ void conv_depthwise_3x3s2_fp32(const float* din,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s2p0_bias_relu
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
flag_relu
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
ctx
);
}
}
else
{
if
(
relu6
)
{
conv_depthwise_3x3s2p0_bias_s
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s2p0_bias_s_relu
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
flag_relu
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
ctx
);
}
}
}
if
(
pad
==
1
)
{
if
(
w_in
>
7
)
{
conv_depthwise_3x3s2p1_bias
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s2p1_bias_s
(
dout
,
if
(
relu6
)
{
conv_depthwise_3x3s2p1_bias
(
dout
,
din
,
weights
,
bias
,
...
...
@@ -151,6 +181,51 @@ void conv_depthwise_3x3s2_fp32(const float* din,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s2p1_bias_relu
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
flag_relu
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
ctx
);
}
}
else
{
if
(
relu6
)
{
conv_depthwise_3x3s2p1_bias_s
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
act_param
,
ctx
);
}
else
{
conv_depthwise_3x3s2p1_bias_s_relu
(
dout
,
din
,
weights
,
bias
,
flag_bias
,
flag_relu
,
num
,
ch_in
,
h_in
,
w_in
,
h_out
,
w_out
,
ctx
);
}
}
}
}
...
...
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