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a5042501
编写于
8月 09, 2018
作者:
H
hanbuhe
浏览文件
操作
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电子邮件补丁
差异文件
change concat template
上级
7aa5c492
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
104 addition
and
34 deletion
+104
-34
src/fpga/fpga_quantilization.cpp
src/fpga/fpga_quantilization.cpp
+83
-0
src/fpga/fpga_quantilization.h
src/fpga/fpga_quantilization.h
+6
-28
src/operators/kernel/fpga/conv_add_bn_kernel.cpp
src/operators/kernel/fpga/conv_add_bn_kernel.cpp
+15
-6
未找到文件。
src/fpga/fpga_quantilization.cpp
0 → 100644
浏览文件 @
a5042501
/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License. */
#include "fpga/fpga_quantilization.h"
#include <algorithm>
namespace
paddle_mobile
{
namespace
fpga
{
template
<
typename
Dtype
>
static
void
chw_to_hwc
(
Dtype
*
data_in
,
Dtype
*
data_out
,
int
num
,
int
channel
,
int
height
,
int
width
)
{
int
offset_height
=
0
;
for
(
int
n
=
0
;
n
<
num
;
n
++
)
{
int
amount_per_row
=
width
*
channel
;
for
(
int
c
=
0
;
c
<
channel
;
c
++
)
{
for
(
int
h
=
0
;
h
<
height
;
h
++
)
{
int
offset_height
=
h
*
amount_per_row
;
for
(
int
w
=
0
;
w
<
width
;
w
++
)
{
*
(
data_out
+
offset_height
+
w
*
channel
+
c
)
=
*
(
data_in
++
);
}
}
}
data_out
+=
num
;
}
}
template
<
typename
Dtype
>
framework
::
Tensor
*
quantilize_filter
(
framework
::
Tensor
*
filter
)
{
float
scale
=
0
;
float
max
=
0
f
;
const
int
batch_size
=
filter
->
dims
()[
0
];
const
int
channel
=
filter
->
dims
()[
1
];
const
int
height
=
filter
->
dims
()[
2
];
const
int
width
=
filter
->
dims
()[
3
];
// 32bit filter -> 8bit filter;
if
(
filter
->
type
()
==
typeid
(
float
))
{
float
*
float_data
=
filter
->
data
<
float
>
();
for
(
int
i
=
0
;
i
<
filter
->
numel
();
++
i
)
{
max
=
std
::
max
(
max
,
float_data
[
i
]);
}
float
fix_range
=
static_cast
<
float
>
((
1
<<
(
8
-
1
))
-
1
);
float
float_range
=
max
;
scale
=
(
float_range
/
fix_range
);
framework
::
Tensor
*
filter
=
filter
;
framework
::
Tensor
*
quant_filter
=
new
framework
::
Tensor
();
int8_t
*
temp
=
new
int8_t
[
filter
->
numel
()];
int8_t
*
int_data
=
quant_filter
->
mutable_data
<
int8_t
>
();
for
(
int
i
=
0
;
i
<
filter
->
numel
();
++
i
)
{
temp
[
i
]
=
(
int8_t
)
float_data
[
i
]
*
scale
;
}
quant_filter
.
scale
=
scale
;
// NCHW -> NHWC;
chw_to_hwc
<
int8_t
>
(
temp
,
int_data
,
in_batch_size
,
channel
,
height
,
width
);
return
quantFilter
;
}
else
if
(
filter
->
type
()
==
typeid
(
int8_t
))
{
// model is already quantilized
int8_t
*
int_data
=
filter
->
data
<
int8_t
>
();
for
(
int
i
=
0
;
i
<
filter
->
numel
();
++
i
)
{
max
=
std
::
max
(
max
,
int_data
[
i
]);
}
}
return
filter
;
}
}
// namespace fpga
}
// namespace paddle_mobile
src/fpga/fpga_quantilization.h
浏览文件 @
a5042501
...
...
@@ -18,35 +18,13 @@ limitations under the License. */
#include "framework/tensor.h"
namespace
paddle_mobile
{
namespace
fpga
{
template
<
typename
Dtype
>
framework
::
Tensor
*
quantilize_filter
(
framework
::
Tensor
*
filter
)
{
float
scale
=
0
;
// 32bit filter -> 8bit filter;
float
min
=
0
f
;
float
max
=
0
f
;
if
(
filter
->
type
()
==
typeid
(
float
))
{
float
*
floatData
=
originalFilter
->
data
<
float
>
();
for
(
int
i
=
0
;
i
<
filter
->
numel
();
++
i
)
{
min
=
std
::
min
(
min
,
floatData
[
i
]);
max
=
std
::
max
(
max
,
floatData
[
i
]);
}
float
fix_range
=
(
float
)((
1
<<
(
8
-
1
))
-
1
);
float
float_range
=
max
;
scale
=
(
float_range
/
fix_range
);
framework
::
Tensor
*
originalFilter
=
filter
;
framework
::
Tensor
*
quantFilter
=
new
framework
::
Tensor
();
int8_t
*
intData
=
quantFilter
->
mutable_data
<
int8_t
>
();
for
(
int
i
=
0
;
i
<
filter
->
numel
();
++
i
)
{
intData
[
i
]
=
(
int8_t
)
floatData
[
i
]
*
scale
;
}
quantFilter
.
scale
=
scale
;
// NCHW -> NHWC;
return
quantFilter
;
}
return
filter
;
}
static
void
chw_to_hwc
(
Dtype
*
data_in
,
Dtype
*
data_out
,
int
num
,
int
channel
,
int
height
,
int
width
);
template
<
typename
Dtype
>
framework
::
Tensor
*
quantilize_filter
(
framework
::
Tensor
*
filter
);
}
// namespace fpga
}
// namespace paddle_mobile
src/operators/kernel/fpga/conv_add_bn_kernel.cpp
浏览文件 @
a5042501
...
...
@@ -16,6 +16,7 @@ limitations under the License. */
#include "operators/kernel/conv_add_bn_kernel.h"
#include "fpga/api/fpga_api.h"
#include "fpga/quantilization.h"
namespace
paddle_mobile
{
namespace
operators
{
...
...
@@ -28,7 +29,7 @@ bool ConvAddBNKernel<FPGA, float>::Init(FusionConvAddBNParam *param) {
const
Tensor
*
bias
=
param
->
Bias
();
auto
bias_ptr
=
bias
->
data
<
float
>
();
const
Tensor
*
filter
=
param
->
Filter
();
auto
filter_ptr
=
filter
->
data
<
float
>
();
Tensor
*
out
=
param
->
Output
();
auto
out_ptr
=
out
->
mutable_data
<
half
>
();
auto
bn_mean_ptr
=
param
->
InputMean
()
->
data
<
float
>
();
...
...
@@ -41,7 +42,8 @@ bool ConvAddBNKernel<FPGA, float>::Init(FusionConvAddBNParam *param) {
"Image channel should be equal to bias number"
);
const
int
channel
=
input
->
dims
()[
1
];
float
*
bs_ptr
=
(
float
*
)
fpga
::
fpga_malloc
(
2
*
channel
*
sizeof
(
float
));
float
*
bs_ptr
=
reinterpret_cast
<
float
*>
(
fpga
::
fpga_malloc
(
2
*
channel
*
sizeof
(
float
)));
Tensor
*
new_scale
=
new
Tensor
();
Tensor
*
new_bias
=
new
Tensor
();
auto
new_scale_ptr
=
new_scale
->
mutable_data
<
float
>
({
channel
});
...
...
@@ -58,26 +60,33 @@ bool ConvAddBNKernel<FPGA, float>::Init(FusionConvAddBNParam *param) {
param
->
SetNewScale
(
new_scale
);
param
->
SetNewBias
(
new_bias
);
const
Tensor
*
quant_filter
=
quantilize_filter
(
filter
);
// delete original filter?
filter
=
quant_filter
;
auto
filter_ptr
=
filter
->
data
<
float
>
();
fpga
::
ConvArgs
convArgs
;
convArgs
.
relu_enabled
=
relu_enabled
;
convArgs
.
filter_address
=
(
void
*
)
filter_ptr
;
convArgs
.
filter_address
=
reinterpret_cast
<
void
*>
filter_ptr
;
convArgs
.
filter_num
=
filter
->
dims
()[
0
];
convArgs
.
group_num
=
param
->
Groups
();
convArgs
.
sb_address
=
(
void
*
)
bs_ptr
;
convArgs
.
sb_address
=
reinterpret_cast
<
void
*>
bs_ptr
;
convArgs
.
kernel
.
stride_h
=
param
->
Strides
()[
0
];
convArgs
.
kernel
.
stride_w
=
param
->
Strides
()[
1
];
convArgs
.
kernel
.
height
=
filter
->
dims
()[
2
];
convArgs
.
kernel
.
width
=
filter
->
dims
()[
3
];
convArgs
.
image
.
address
=
(
void
*
)
input_ptr
;
convArgs
.
image
.
address
=
reinterpret_cast
<
void
*>
input_ptr
;
convArgs
.
image
.
channels
=
input
->
dims
()[
1
];
convArgs
.
image
.
height
=
input
->
dims
()[
2
];
convArgs
.
image
.
width
=
input
->
dims
()[
3
];
convArgs
.
image
.
pad_height
=
param
->
Paddings
()[
0
];
convArgs
.
image
.
pad_width
=
param
->
Paddings
()[
1
];
convArgs
.
image
.
scale_address
=
input
->
fpga_args
().
scale_pointer
();
convArgs
.
output
.
address
=
(
void
*
)
out_ptr
;
convArgs
.
output
.
address
=
reinterpret_cast
<
void
*>
out_ptr
;
convArgs
.
output
.
scale_address
=
out
->
fpga_args
().
scale_pointer
();
param
->
SetFpgaArgs
(
convArgs
);
return
true
;
}
...
...
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