未验证 提交 7931104f 编写于 作者: Z Zhaolong Xing 提交者: GitHub

CUDA: can run yolov3 int8 (#2172)

* add conv int8 support(in condition which the input or output channel not be the times of 4)
add add_kernel for cuda.

* can run yolov3 fp32
test=develop

* 1. fix bug with yolov3 run
test=develop

* can run yolov3 int8 test=develop
上级 1ae9239e
...@@ -8,6 +8,7 @@ nv_library(cuda_type_trans SRCS type_trans.cu) ...@@ -8,6 +8,7 @@ nv_library(cuda_type_trans SRCS type_trans.cu)
nv_library(cuda_transpose SRCS transpose.cu ) nv_library(cuda_transpose SRCS transpose.cu )
nv_library(cudnn_conv SRCS cudnn_conv.cc DEPS cuda_activation cuda_scale nv_library(cudnn_conv SRCS cudnn_conv.cc DEPS cuda_activation cuda_scale
cuda_type_trans) cuda_type_trans)
nv_library(cuda_elementwise SRCS elementwise.cu )
set ( set (
math_cuda math_cuda
...@@ -16,6 +17,7 @@ set ( ...@@ -16,6 +17,7 @@ set (
cuda_scale cuda_scale
cuda_type_trans cuda_type_trans
cuda_transpose cuda_transpose
cuda_elementwise
) )
set(math_cuda "${math_cuda}" CACHE GLOBAL "math cuda") set(math_cuda "${math_cuda}" CACHE GLOBAL "math cuda")
...@@ -53,6 +53,32 @@ __global__ void bias_relu_kernel(const int num, ...@@ -53,6 +53,32 @@ __global__ void bias_relu_kernel(const int num,
} }
} }
template <typename Dtype>
__global__ void bias_relu_int8_nhwc_kernel(int num,
const float* in,
const float* bias,
Dtype* out,
int N,
int C,
int H,
int W,
const float* scale,
float alpha) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < num) {
int idx = tid % C;
#if __CUDA_ARCH__ >= 350
float temp = __ldg(in + tid) * __ldg(scale + idx) + __ldg(bias + idx);
out[tid] =
temp > 0 ? from_float<Dtype>(temp) : from_float<Dtype>(temp * alpha);
#else
float temp = in[tid] * scale[idx] + bias[idx];
out[tid] =
temp > 0 ? from_float<Dtype>(temp) : from_float<Dtype>(temp * alpha);
#endif
}
}
__global__ void bias_relu_int8_nhwc4_kernel(int num, __global__ void bias_relu_int8_nhwc4_kernel(int num,
const float4* in, const float4* in,
const float4* bias, const float4* bias,
...@@ -119,6 +145,29 @@ __global__ void bias_relu_int8_nhwc4_kernel(int num, ...@@ -119,6 +145,29 @@ __global__ void bias_relu_int8_nhwc4_kernel(int num,
} }
} }
template <typename Dtype>
__global__ void bias_int8_nhwc_kernel(int num,
const float* in,
const float* bias,
Dtype* out,
int N,
int C,
int H,
int W,
const float* scale) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < num) {
int idx = tid % C;
#if __CUDA_ARCH__ >= 350
float temp = __ldg(in + tid) * __ldg(scale + idx) + __ldg(bias + idx);
out[tid] = from_float<Dtype>(temp);
#else
float temp = in[tid] * scale[idx] + bias[idx];
out[tid] = from_float<Dtype>(temp);
#endif
}
}
__global__ void relu_int8_nhwc4_kernel(int num, __global__ void relu_int8_nhwc4_kernel(int num,
const float4* in, const float4* in,
float4* out, float4* out,
...@@ -182,59 +231,135 @@ __global__ void relu_int8_nhwc4_kernel(int num, ...@@ -182,59 +231,135 @@ __global__ void relu_int8_nhwc4_kernel(int num,
} }
template <> template <>
void bias_relu_int8_nhwc4<float>(int num, void bias_relu_int8_nhwc<float>(int num,
const void* in,
const void* bias,
void* out,
int N,
int C,
int H,
int W,
const void* scale,
float alpha,
cudaStream_t stream) {
int thread = 256;
if (C % 4 == 0) {
int block = (num / 4 + thread - 1) / thread;
bias_relu_int8_nhwc4_kernel<<<block, thread, 0, stream>>>(
num / 4,
static_cast<const float4*>(in),
static_cast<const float4*>(bias),
static_cast<float4*>(out),
N,
C / 4,
H,
W,
static_cast<const float4*>(scale),
alpha);
} else {
int block = (num + thread - 1) / thread;
bias_relu_int8_nhwc_kernel<<<block, thread, 0, stream>>>(
num,
static_cast<const float*>(in),
static_cast<const float*>(bias),
static_cast<float*>(out),
N,
C,
H,
W,
static_cast<const float*>(scale),
alpha);
}
}
template <>
void bias_relu_int8_nhwc<int8_t>(int num,
const void* in, const void* in,
const void* bias, const void* bias,
void* out, void* out,
int N, int N,
int K, int C,
int H, int H,
int W, int W,
const void* scale, const void* scale,
float alpha, float alpha,
cudaStream_t stream) { cudaStream_t stream) {
int thread = 256; int thread = 256;
int block = (num + thread - 1) / thread; if (C % 4 == 0) {
bias_relu_int8_nhwc4_kernel<<<block, thread, 0, stream>>>( int block = (num / 4 + thread - 1) / thread;
num, bias_relu_int8_nhwc4_kernel<<<block, thread, 0, stream>>>(
static_cast<const float4*>(in), num / 4,
static_cast<const float4*>(bias), static_cast<const float4*>(in),
static_cast<float4*>(out), static_cast<const float4*>(bias),
N, static_cast<char4*>(out),
K, N,
H, C / 4,
W, H,
static_cast<const float4*>(scale), W,
alpha); static_cast<const float4*>(scale),
alpha);
} else {
int block = (num + thread - 1) / thread;
bias_relu_int8_nhwc_kernel<<<block, thread, 0, stream>>>(
num,
static_cast<const float*>(in),
static_cast<const float*>(bias),
static_cast<int8_t*>(out),
N,
C,
H,
W,
static_cast<const float*>(scale),
alpha);
}
} }
template <> template <typename out_type>
void bias_relu_int8_nhwc4<int8_t>(int num, void bias_int8_nhwc(int num,
const void* in, const void* in,
const void* bias, const void* bias,
void* out, void* out,
int N, int N,
int K, int C,
int H, int H,
int W, int W,
const void* scale, const void* scale,
float alpha, cudaStream_t stream) {
cudaStream_t stream) {
int thread = 256; int thread = 256;
int block = (num + thread - 1) / thread; int block = (num + thread - 1) / thread;
bias_relu_int8_nhwc4_kernel<<<block, thread, 0, stream>>>( bias_int8_nhwc_kernel<<<block, thread, 0, stream>>>(
num, num,
static_cast<const float4*>(in), static_cast<const float*>(in),
static_cast<const float4*>(bias), static_cast<const float*>(bias),
static_cast<char4*>(out), static_cast<out_type*>(out),
N, N,
K, C,
H, H,
W, W,
static_cast<const float4*>(scale), static_cast<const float*>(scale));
alpha);
} }
template void bias_int8_nhwc<float>(int,
const void*,
const void* bias,
void*,
int,
int,
int,
int,
const void*,
cudaStream_t);
template void bias_int8_nhwc<int8_t>(int,
const void*,
const void* bias,
void*,
int,
int,
int,
int,
const void*,
cudaStream_t);
template <> template <>
void relu_int8_nhwc4<float>(int num, void relu_int8_nhwc4<float>(int num,
const void* in, const void* in,
......
...@@ -48,17 +48,29 @@ void bias_relu(int num, ...@@ -48,17 +48,29 @@ void bias_relu(int num,
// For int8 // For int8
template <typename out_type> template <typename out_type>
void bias_relu_int8_nhwc4(int num, void bias_relu_int8_nhwc(int num,
const void* in, const void* in,
const void* bias, const void* bias,
void* out, void* out,
int N, int N,
int K, int C,
int H, int H,
int W, int W,
const void* scale, const void* scale,
float alpha, float alpha,
cudaStream_t stream); cudaStream_t stream);
template <typename out_type>
void bias_int8_nhwc(int num,
const void* in,
const void* bias,
void* out,
int N,
int C,
int H,
int W,
const void* scale,
cudaStream_t stream);
} // namespace math } // namespace math
} // namespace cuda } // namespace cuda
......
...@@ -441,6 +441,7 @@ bool CudnnConv2DInt8<Ptype_out>::run(const operators::ConvParam& param) { ...@@ -441,6 +441,7 @@ bool CudnnConv2DInt8<Ptype_out>::run(const operators::ConvParam& param) {
if (Ptype_out == PRECISION(kInt8)) { if (Ptype_out == PRECISION(kInt8)) {
temp_out = this->temp_tensor_.template mutable_data<float>(TARGET(kCUDA)); temp_out = this->temp_tensor_.template mutable_data<float>(TARGET(kCUDA));
} else { } else {
// LOG(INFO) << param.output->dims().repr();
temp_out = param.output->mutable_data<float>(TARGET(kCUDA)); temp_out = param.output->mutable_data<float>(TARGET(kCUDA));
} }
...@@ -462,30 +463,30 @@ bool CudnnConv2DInt8<Ptype_out>::run(const operators::ConvParam& param) { ...@@ -462,30 +463,30 @@ bool CudnnConv2DInt8<Ptype_out>::run(const operators::ConvParam& param) {
auto out_dims = param.output->dims(); auto out_dims = param.output->dims();
int n = out_dims[0], h = out_dims[1], w = out_dims[2], c = out_dims[3]; int n = out_dims[0], h = out_dims[1], w = out_dims[2], c = out_dims[3];
int num = n * h * w * c / 4; int num = n * h * w * c;
if (!param.activation_param.has_active && !b_data) { if (!param.activation_param.has_active && !b_data) {
if (Ptype_out == PRECISION(kInt8)) { if (Ptype_out == PRECISION(kInt8)) {
auto* out = param.output->mutable_data<int8_t>(TARGET(kCUDA)); auto* out = param.output->mutable_data<int8_t>(TARGET(kCUDA));
fp32_to_int8_nhwc4(num, fp32_to_int8_nhwc(num,
static_cast<const void*>(temp_out), static_cast<const void*>(temp_out),
static_cast<void*>(out), static_cast<void*>(out),
static_cast<const void*>(scale), static_cast<const void*>(scale),
n, n,
c / 4, c,
h, h,
w, w,
this->stream_); this->stream_);
} else { } else {
fp32_scale_nhwc4(num, fp32_scale_nhwc(num,
static_cast<const void*>(temp_out), static_cast<const void*>(temp_out),
static_cast<void*>(temp_out), static_cast<void*>(temp_out),
static_cast<const void*>(scale), static_cast<const void*>(scale),
n, n,
c / 4, c,
h, h,
w, w,
this->stream_); this->stream_);
} }
return true; return true;
} }
...@@ -497,29 +498,55 @@ bool CudnnConv2DInt8<Ptype_out>::run(const operators::ConvParam& param) { ...@@ -497,29 +498,55 @@ bool CudnnConv2DInt8<Ptype_out>::run(const operators::ConvParam& param) {
alpha = param.activation_param.Leaky_relu_alpha; alpha = param.activation_param.Leaky_relu_alpha;
if (Ptype_out == PRECISION(kInt8)) { if (Ptype_out == PRECISION(kInt8)) {
auto* out = param.output->mutable_data<int8_t>(TARGET(kCUDA)); auto* out = param.output->mutable_data<int8_t>(TARGET(kCUDA));
bias_relu_int8_nhwc4<int8_t>(num, bias_relu_int8_nhwc<int8_t>(num,
static_cast<const void*>(temp_out),
static_cast<const void*>(b_data),
static_cast<void*>(out),
n,
c / 4,
h,
w,
static_cast<const void*>(scale),
alpha,
this->stream_);
} else {
bias_relu_int8_nhwc4<float>(num,
static_cast<const void*>(temp_out), static_cast<const void*>(temp_out),
static_cast<const void*>(b_data), static_cast<const void*>(b_data),
static_cast<void*>(temp_out), static_cast<void*>(out),
n, n,
c / 4, c,
h, h,
w, w,
static_cast<const void*>(scale), static_cast<const void*>(scale),
alpha, alpha,
this->stream_); this->stream_);
} else {
bias_relu_int8_nhwc<float>(num,
static_cast<const void*>(temp_out),
static_cast<const void*>(b_data),
static_cast<void*>(temp_out),
n,
c,
h,
w,
static_cast<const void*>(scale),
alpha,
this->stream_);
}
return true;
} else {
if (Ptype_out == PRECISION(kInt8)) {
auto* out = param.output->mutable_data<int8_t>(TARGET(kCUDA));
bias_int8_nhwc<int8_t>(num,
static_cast<const void*>(temp_out),
static_cast<const void*>(b_data),
static_cast<void*>(out),
n,
c,
h,
w,
static_cast<const void*>(scale),
this->stream_);
} else {
bias_int8_nhwc<int8_t>(num,
static_cast<const void*>(temp_out),
static_cast<const void*>(b_data),
static_cast<void*>(temp_out),
n,
c,
h,
w,
static_cast<const void*>(scale),
this->stream_);
} }
return true; return true;
} }
......
// Copyright (c) 2019 PaddlePaddle Authors. All Rights Reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "lite/backends/cuda/math/elementwise.h"
#include "lite/backends/cuda/math/utils.h"
namespace paddle {
namespace lite {
namespace cuda {
namespace math {
template <typename Dtype>
__global__ void elementwise_add_kernel(const size_t total,
const Dtype* x_data,
const Dtype* y_data,
Dtype* out_data) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < total) {
#if __CUDA_ARCH__ >= 350
out_data[tid] = __ldg(x_data + tid) + __ldg(y_data + tid);
#else
out_data[tid] = x_data[tid] + y_data[tid];
#endif
}
}
__global__ void elementwise_add_int8_kernel(const size_t total,
const float* x_data,
const float* y_data,
const float alpha,
int8_t* out_data) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < total) {
float temp_d;
#if __CUDA_ARCH__ >= 350
temp_d = __ldg(x_data + tid) + __ldg(y_data + tid);
#else
temp_d = x_data[tid] + y_data[tid];
#endif
out_data[tid] = from_float<int8_t>(temp_d * alpha);
}
}
__global__ void elementwise_add_nhwc4_int8_kernel(const size_t total,
const float4* x_data,
const float4* y_data,
const float alpha,
char4* out_data) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < total) {
const float4 x_d = x_data[tid];
const float4 y_d = y_data[tid];
float4 packed_val;
char4 result_val;
packed_val.x = (x_d.x + y_d.x) * alpha;
result_val.x = from_float<int8_t>(packed_val.x);
packed_val.y = (x_d.y + y_d.y) * alpha;
result_val.y = from_float<int8_t>(packed_val.y);
packed_val.z = (x_d.z + y_d.z) * alpha;
result_val.z = from_float<int8_t>(packed_val.z);
packed_val.w = (x_d.w + y_d.w) * alpha;
result_val.w = from_float<int8_t>(packed_val.w);
out_data[tid] = result_val;
}
}
template <typename Dtype>
void elementwise_add(int num,
const Dtype* x_data,
const Dtype* y_data,
Dtype* out_data,
cudaStream_t stream) {
int thread = 256;
int block = (num + thread - 1) / thread;
elementwise_add_kernel<<<block, thread, 0, stream>>>(
num, x_data, y_data, out_data);
}
template void elementwise_add(
int, const float*, const float*, float*, cudaStream_t);
// input type is float32
// output type is int8
void elementwise_add_int8(int num,
const float* x_data,
const float* y_data,
const float alpha,
int8_t* out_data,
cudaStream_t stream) {
int thread = 256;
int block = (num + thread - 1) / thread;
// elementwise_add_int8_kernel<<<block, thread, 0, stream>>>(
elementwise_add_int8_kernel<<<block, thread>>>(
num, x_data, y_data, alpha, out_data);
}
void elementwise_add_nhwc4_int8(int num,
const void* x_data,
const void* y_data,
const float alpha,
void* out_data,
cudaStream_t stream) {
int thread = 512;
int block = (num + thread - 1) / thread;
// elementwise_add_nhwc4_int8_kernel<<<block, thread, 0, stream>>>(
elementwise_add_nhwc4_int8_kernel<<<block, thread>>>(
num,
static_cast<const float4*>(x_data),
static_cast<const float4*>(y_data),
alpha,
static_cast<char4*>(out_data));
}
} // namespace math
} // namespace cuda
} // namespace lite
} // namespace paddle
// Copyright (c) 2019 PaddlePaddle Authors. All Rights Reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <cuda.h>
#include <cuda_runtime.h>
namespace paddle {
namespace lite {
namespace cuda {
namespace math {
template <typename Dtype>
void elementwise_add(int num,
const Dtype* x_data,
const Dtype* y_data,
Dtype* out_data,
cudaStream_t stream);
void elementwise_add_int8(int num,
const float* x_data,
const float* y_data,
const float alpha,
int8_t* out_data,
cudaStream_t stream);
// input type is float32
// output type is int8
void elementwise_add_nhwc4_int8(int num,
const void* x_data,
const void* y_data,
const float alpha,
void* out_data,
cudaStream_t stream);
} // namespace math
} // namespace cuda
} // namespace lite
} // namespace paddle
...@@ -56,26 +56,59 @@ __global__ void fp32_scale_nhwc4_kernel(int num, ...@@ -56,26 +56,59 @@ __global__ void fp32_scale_nhwc4_kernel(int num,
} }
} }
void fp32_scale_nhwc4(int num, __global__ void fp32_scale_nhwc_kernel(int num,
const void* in, const float* in,
void* out, float* out,
const void* scale, const float* scale,
int N, int N,
int K, int C,
int H, int H,
int W, int W) {
cudaStream_t stream) { int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < num) {
int idx = tid % C;
#if __CUDA_ARCH__ >= 350
out[tid] = __ldg(in + tid) * __ldg(scale + idx);
#else
out[tid] = in[tid] * scale[idx];
#endif
}
}
void fp32_scale_nhwc(int num,
const void* in,
void* out,
const void* scale,
int N,
int C,
int H,
int W,
cudaStream_t stream) {
int thread = 256; int thread = 256;
int block = (num + thread - 1) / thread; if (C % 4 == 0) {
fp32_scale_nhwc4_kernel<<<block, thread, 0, stream>>>( int block = (num / 4 + thread - 1) / thread;
num, fp32_scale_nhwc4_kernel<<<block, thread, 0, stream>>>(
static_cast<const float4*>(in), num / 4,
static_cast<float4*>(out), static_cast<const float4*>(in),
static_cast<const float4*>(scale), static_cast<float4*>(out),
N, static_cast<const float4*>(scale),
K, N,
H, C / 4,
W); H,
W);
} else {
int block = (num + thread - 1) / thread;
fp32_scale_nhwc_kernel<<<block, thread, 0, stream>>>(
num,
static_cast<const float*>(in),
static_cast<float*>(out),
static_cast<const float*>(scale),
N,
C,
H,
W);
}
cudaError_t error = cudaGetLastError(); cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) std::cout << cudaGetErrorString(error); if (error != cudaSuccess) std::cout << cudaGetErrorString(error);
} }
......
...@@ -21,15 +21,21 @@ namespace lite { ...@@ -21,15 +21,21 @@ namespace lite {
namespace cuda { namespace cuda {
namespace math { namespace math {
void fp32_scale_nhwc4(int num, void fp32_scale_nhwc(int num,
const void* din, const void* din,
void* dout, void* dout,
const void* scale, const void* scale,
int N, int N,
int K, int K,
int H, int H,
int W, int W,
cudaStream_t stream); cudaStream_t stream);
template <typename T>
void scale(int num, const T* in, T* out, float scale, cudaStream_t stream);
template <typename T>
void scale(int num, const T* in, T* out, float scale);
template <typename T> template <typename T>
void scale(int num, const T* in, T* out, float scale, cudaStream_t stream); void scale(int num, const T* in, T* out, float scale, cudaStream_t stream);
......
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
// See the License for the specific language governing permissions and // See the License for the specific language governing permissions and
// limitations under the License. // limitations under the License.
#include "lite/backends/cuda/cuda_utils.h"
#include "lite/backends/cuda/math/transpose.h" #include "lite/backends/cuda/math/transpose.h"
#include "lite/backends/cuda/math/utils.h" #include "lite/backends/cuda/math/utils.h"
...@@ -171,6 +172,8 @@ void TransposeCUDAImpl(const std::vector<int64_t>& X_dims, ...@@ -171,6 +172,8 @@ void TransposeCUDAImpl(const std::vector<int64_t>& X_dims,
const int M = (size + CUDA_NUM_THREADS - 1) / CUDA_NUM_THREADS; const int M = (size + CUDA_NUM_THREADS - 1) / CUDA_NUM_THREADS;
TransposeCUDAKernel<<<M, CUDA_NUM_THREADS, 0, ctx->exec_stream()>>>( TransposeCUDAKernel<<<M, CUDA_NUM_THREADS, 0, ctx->exec_stream()>>>(
size, ndim, d_strides, d_y_dims, X, Y); size, ndim, d_strides, d_y_dims, X, Y);
auto e = cudaGetLastError();
CHECK_EQ(e, cudaSuccess) << " CUDA: " << cudaGetErrorString(e);
} }
#define TYPE_SPECIALIZED_CUDA_TRANSPOSE(T) \ #define TYPE_SPECIALIZED_CUDA_TRANSPOSE(T) \
......
...@@ -20,14 +20,33 @@ namespace lite { ...@@ -20,14 +20,33 @@ namespace lite {
namespace cuda { namespace cuda {
namespace math { namespace math {
__global__ void fp32_scale_nhwc4_kernel(int num, __global__ void fp32_to_int8_nhwc_kernel(int num,
const float4* in, const float* in,
char4* out, int8_t* out,
const float4* scale, const float* scale,
int N, int N,
int K, int C,
int H, int H,
int W) { int W) {
int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < num) {
int idx = tid % C;
#if __CUDA_ARCH__ >= 350
out[tid] = from_float<int8_t>(__ldg(in + tid) * __ldg(scale + idx));
#else
out[tid] = from_float<int8_t>(in[tid] * scale[idx]);
#endif
}
}
__global__ void fp32_to_int8_nhwc4_kernel(int num,
const float4* in,
char4* out,
const float4* scale,
int N,
int K,
int H,
int W) {
int tid = blockIdx.x * blockDim.x + threadIdx.x; int tid = blockIdx.x * blockDim.x + threadIdx.x;
if (tid < num) { if (tid < num) {
int scale_idx = tid % K; int scale_idx = tid % K;
...@@ -43,26 +62,39 @@ __global__ void fp32_scale_nhwc4_kernel(int num, ...@@ -43,26 +62,39 @@ __global__ void fp32_scale_nhwc4_kernel(int num,
} }
} }
void fp32_to_int8_nhwc4(int num, void fp32_to_int8_nhwc(int num,
const void* in, const void* in,
void* out, void* out,
const void* scale, const void* scale,
int N, int N,
int K, int C,
int H, int H,
int W, int W,
cudaStream_t stream) { cudaStream_t stream) {
int thread = 256; int thread = 256;
int block = (num + thread - 1) / thread; if (C % 4 == 0) {
fp32_scale_nhwc4_kernel<<<block, thread, 0, stream>>>( int block = (num / 4 + thread - 1) / thread;
num, fp32_to_int8_nhwc4_kernel<<<block, thread, 0, stream>>>(
static_cast<const float4*>(in), num / 4,
static_cast<char4*>(out), static_cast<const float4*>(in),
static_cast<const float4*>(scale), static_cast<char4*>(out),
N, static_cast<const float4*>(scale),
K, N,
H, C / 4,
W); H,
W);
} else {
int block = (num + thread - 1) / thread;
fp32_to_int8_nhwc_kernel<<<block, thread, 0, stream>>>(
num,
static_cast<const float*>(in),
static_cast<int8_t*>(out),
static_cast<const float*>(scale),
N,
C,
H,
W);
}
} }
} // namespace math } // namespace math
......
...@@ -21,15 +21,15 @@ namespace lite { ...@@ -21,15 +21,15 @@ namespace lite {
namespace cuda { namespace cuda {
namespace math { namespace math {
void fp32_to_int8_nhwc4(int num, void fp32_to_int8_nhwc(int num,
const void* din, const void* din,
void* dout, void* dout,
const void* scale, const void* scale,
int N, int N,
int K, int C,
int H, int H,
int W, int W,
cudaStream_t stream); cudaStream_t stream);
} // namespace math } // namespace math
} // namespace cuda } // namespace cuda
......
...@@ -90,7 +90,9 @@ std::string Visualize(mir::SSAGraph* graph) { ...@@ -90,7 +90,9 @@ std::string Visualize(mir::SSAGraph* graph) {
} }
auto res = dot.Build(); auto res = dot.Build();
LOG(INFO) << "dot:\n" << res; // If we use VLOG here, we can not type all graph out.
// So we change VLOG to std::cout.
std::cout << "dot:\n" << res << std::endl;
return res; return res;
} }
......
...@@ -26,8 +26,8 @@ namespace mir { ...@@ -26,8 +26,8 @@ namespace mir {
bool SSAGraph::CheckBidirectionalConnection() { bool SSAGraph::CheckBidirectionalConnection() {
VLOG(4) << "node count " << node_storage_.size(); VLOG(4) << "node count " << node_storage_.size();
for (auto &node : node_storage_) { for (auto &node : node_storage_) {
if (node.IsStmt()) VLOG(4) << node.AsStmt().op_info()->Type(); if (node.IsStmt()) VLOG(6) << node.AsStmt().op_info()->Type();
if (node.IsArg()) VLOG(4) << node.AsArg().name << " " << node.AsArg().id; if (node.IsArg()) VLOG(6) << node.AsArg().name << " " << node.AsArg().id;
for (auto *in : node.inlinks) { for (auto *in : node.inlinks) {
CHECK(in->outlinks.end() != CHECK(in->outlinks.end() !=
std::find(in->outlinks.begin(), in->outlinks.end(), &node)); std::find(in->outlinks.begin(), in->outlinks.end(), &node));
......
...@@ -124,6 +124,7 @@ void TypeLayoutTransformPass::AddLayoutInst( ...@@ -124,6 +124,7 @@ void TypeLayoutTransformPass::AddLayoutInst(
bool is_found = false; bool is_found = false;
for (auto& kernel : kernels) { for (auto& kernel : kernels) {
const Type* in_arg_ty = kernel->GetInputDeclType("Input"); const Type* in_arg_ty = kernel->GetInputDeclType("Input");
const Type* out_arg_ty = kernel->GetOutputDeclType("Out");
// const Type* out_arg_ty = kernel->GetOutputDeclType("Out"); // unused variable // const Type* out_arg_ty = kernel->GetOutputDeclType("Out"); // unused variable
#ifdef LITE_WITH_OPENCL #ifdef LITE_WITH_OPENCL
// ignore [layout check] for layout trans from image2d to buffer // ignore [layout check] for layout trans from image2d to buffer
...@@ -131,7 +132,8 @@ void TypeLayoutTransformPass::AddLayoutInst( ...@@ -131,7 +132,8 @@ void TypeLayoutTransformPass::AddLayoutInst(
PrecisionCompatibleTo(*in_arg_ty, from) && PrecisionCompatibleTo(*in_arg_ty, from) &&
DeviceCompatibleTo(*in_arg_ty, from)) { DeviceCompatibleTo(*in_arg_ty, from)) {
#else #else
if (TypeCompatible(*in_arg_ty, from)) { if (TypeCompatible(*in_arg_ty, from) &&
out_arg_ty->layout() == to.layout()) {
#endif #endif
is_found = true; is_found = true;
selected_kernels.emplace_back(std::move(kernel)); selected_kernels.emplace_back(std::move(kernel));
......
...@@ -54,7 +54,7 @@ void TypeTargetTransformPass::ComplementInputs(SSAGraph* graph, ...@@ -54,7 +54,7 @@ void TypeTargetTransformPass::ComplementInputs(SSAGraph* graph,
CHECK(inst_node->IsStmt()); CHECK(inst_node->IsStmt());
auto& inst = inst_node->AsStmt(); auto& inst = inst_node->AsStmt();
LOG(INFO) << "found Target tensor: " << in->AsArg().name; VLOG(3) << "found Target tensor: " << in->AsArg().name;
CHECK(in->IsRoleSet()); CHECK(in->IsRoleSet());
CHECK(in->IsArg()); CHECK(in->IsArg());
auto in_arg_name = in->AsArg().name; auto in_arg_name = in->AsArg().name;
...@@ -64,9 +64,9 @@ void TypeTargetTransformPass::ComplementInputs(SSAGraph* graph, ...@@ -64,9 +64,9 @@ void TypeTargetTransformPass::ComplementInputs(SSAGraph* graph,
auto decl_arg_type = inst.picked_kernel().GetInputDeclType(tmp); auto decl_arg_type = inst.picked_kernel().GetInputDeclType(tmp);
CHECK(in->AsArg().type); CHECK(in->AsArg().type);
if (!TargetCompatibleTo(*in->AsArg().type, *decl_arg_type)) { if (!TargetCompatibleTo(*in->AsArg().type, *decl_arg_type)) {
LOG(INFO) << "found Target unmatched tensor: " << in->AsArg().name VLOG(3) << "found Target unmatched tensor: " << in->AsArg().name
<< " for kernel " << inst.op()->DebugString() << " " << " for kernel " << inst.op()->DebugString() << " "
<< *in->AsArg().type << " -> " << *decl_arg_type; << *in->AsArg().type << " -> " << *decl_arg_type;
// Add an IoCopy instruction to make the input compatible with other dist. // Add an IoCopy instruction to make the input compatible with other dist.
AddIoCopyInst( AddIoCopyInst(
*in->AsArg().type, *decl_arg_type, in, graph, inst_node, valid_places_); *in->AsArg().type, *decl_arg_type, in, graph, inst_node, valid_places_);
...@@ -126,7 +126,9 @@ void TypeTargetTransformPass::AddIoCopyInst( ...@@ -126,7 +126,9 @@ void TypeTargetTransformPass::AddIoCopyInst(
PrecisionCompatibleTo(*in_arg_ty, from) && PrecisionCompatibleTo(*in_arg_ty, from) &&
DeviceCompatibleTo(*in_arg_ty, from)) { DeviceCompatibleTo(*in_arg_ty, from)) {
#else #else
if (TypeCompatible(*in_arg_ty, from)) { const Type* out_arg_ty = kernel->GetOutputDeclType("Out");
if (TypeCompatible(*in_arg_ty, from) &&
out_arg_ty->target() == to.target()) {
#endif #endif
is_found = true; is_found = true;
selected_kernels.emplace_back(std::move(kernel)); selected_kernels.emplace_back(std::move(kernel));
......
...@@ -69,8 +69,8 @@ class VariablePlaceInferencePass : public DebugPass { ...@@ -69,8 +69,8 @@ class VariablePlaceInferencePass : public DebugPass {
#ifndef LITE_WITH_FPGA #ifndef LITE_WITH_FPGA
#ifndef LITE_WITH_OPENCL #ifndef LITE_WITH_OPENCL
w->AsArg().type = w->AsArg().type = LiteType::GetTensorTy(
LiteType::GetTensorTy(TARGET(kHost), type.precision(), type.layout()); TARGET(kHost), type.precision(), DATALAYOUT(kNCHW));
#endif #endif
#endif #endif
} }
......
...@@ -63,7 +63,7 @@ std::vector<std::unique_ptr<KernelBase>> OpLite::CreateKernels( ...@@ -63,7 +63,7 @@ std::vector<std::unique_ptr<KernelBase>> OpLite::CreateKernels(
targets.insert(place.target); targets.insert(place.target);
} }
VLOG(4) << "op " << op_type_ << " get " << kernels.size() << " kernels"; VLOG(5) << "op " << op_type_ << " get " << kernels.size() << " kernels";
return kernels; return kernels;
} }
......
...@@ -57,7 +57,7 @@ class OpLite : public Registry { ...@@ -57,7 +57,7 @@ class OpLite : public Registry {
: valid_places_(valid_places) {} : valid_places_(valid_places) {}
void SetValidPlaces(const std::vector<Place> &places) { void SetValidPlaces(const std::vector<Place> &places) {
VLOG(3) << "valid places " << valid_places_.size(); VLOG(5) << "valid places " << valid_places_.size();
valid_places_ = places; valid_places_ = places;
} }
const std::vector<Place> &valid_places() const { return valid_places_; } const std::vector<Place> &valid_places() const { return valid_places_; }
......
...@@ -12,7 +12,7 @@ add_kernel(transpose_compute_cuda CUDA basic SRCS transpose_compute.cu DEPS ${li ...@@ -12,7 +12,7 @@ add_kernel(transpose_compute_cuda CUDA basic SRCS transpose_compute.cu DEPS ${li
add_kernel(nearest_interp_compute_cuda CUDA basic SRCS nearest_interp_compute.cu DEPS ${lite_kernel_deps}) add_kernel(nearest_interp_compute_cuda CUDA basic SRCS nearest_interp_compute.cu DEPS ${lite_kernel_deps})
add_kernel(conv2d_cuda CUDA basic SRCS conv_compute.cc DEPS ${lite_kernel_deps} ${math_cuda}) add_kernel(conv2d_cuda CUDA basic SRCS conv_compute.cc DEPS ${lite_kernel_deps} ${math_cuda})
add_kernel(concat_compute_cuda CUDA basic SRCS concat_compute.cu DEPS ${lite_kernel_deps}) add_kernel(concat_compute_cuda CUDA basic SRCS concat_compute.cu DEPS ${lite_kernel_deps})
add_kernel(elementwise_add_compute_cuda CUDA basic SRCS elementwise_add_compute.cu DEPS ${lite_kernel_deps}) add_kernel(elementwise_add_compute_cuda CUDA basic SRCS elementwise_add_compute.cu DEPS ${lite_kernel_deps} cuda_elementwise)
add_kernel(calib_compute_cuda CUDA basic SRCS calib_compute.cu DEPS ${lite_kernel_deps}) add_kernel(calib_compute_cuda CUDA basic SRCS calib_compute.cu DEPS ${lite_kernel_deps})
add_kernel(layout_compute_cuda CUDA basic SRCS layout_compute.cc DEPS ${lite_kernel_deps} cuda_transpose) add_kernel(layout_compute_cuda CUDA basic SRCS layout_compute.cc DEPS ${lite_kernel_deps} cuda_transpose)
add_kernel(feed_compute_cuda CUDA basic SRCS feed_compute.cc DEPS ${lite_kernel_deps}) add_kernel(feed_compute_cuda CUDA basic SRCS feed_compute.cc DEPS ${lite_kernel_deps})
...@@ -25,4 +25,4 @@ nv_test(yolo_box_compute_cuda_test SRCS yolo_box_compute_test.cc DEPS yolo_box_c ...@@ -25,4 +25,4 @@ nv_test(yolo_box_compute_cuda_test SRCS yolo_box_compute_test.cc DEPS yolo_box_c
nv_test(transpose_compute_cuda_test SRCS transpose_compute_test.cc DEPS transpose_compute_cuda) nv_test(transpose_compute_cuda_test SRCS transpose_compute_test.cc DEPS transpose_compute_cuda)
nv_test(concat_compute_cuda_test SRCS concat_compute_test.cc DEPS concat_compute_cuda) nv_test(concat_compute_cuda_test SRCS concat_compute_test.cc DEPS concat_compute_cuda)
nv_test(elementwise_add_compute_cuda_test SRCS elementwise_add_compute_test.cc DEPS elementwise_add_compute_cuda) nv_test(elementwise_add_compute_cuda_test SRCS elementwise_add_compute_test.cc DEPS elementwise_add_compute_cuda)
nv_test(layout_cuda_test SRCS layout_compute_test.cc DEPS layout_compute_cuda) #nv_test(layout_cuda_test SRCS layout_compute_test.cc DEPS layout_compute_cuda)
...@@ -87,45 +87,63 @@ void CalibComputeInt8ToFp32::Run() { ...@@ -87,45 +87,63 @@ void CalibComputeInt8ToFp32::Run() {
REGISTER_LITE_KERNEL(calib, REGISTER_LITE_KERNEL(calib,
kCUDA, kCUDA,
kInt8, kFloat,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::CalibComputeFp32ToInt8, paddle::lite::kernels::cuda::CalibComputeFp32ToInt8,
fp32_to_int8) fp32_to_int8)
.BindInput("Input", .BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA), PRECISION(kFloat))}) {LiteType::GetTensorTy(TARGET(kCUDA),
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA), PRECISION(kInt8))}) PRECISION(kFloat),
DATALAYOUT(kAny))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8),
DATALAYOUT(kAny))})
.Finalize(); .Finalize();
REGISTER_LITE_KERNEL(calib, REGISTER_LITE_KERNEL(calib,
kCUDA, kCUDA,
kInt8, kFloat,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::CalibComputeInt8ToFp32, paddle::lite::kernels::cuda::CalibComputeInt8ToFp32,
int8_to_fp32) int8_to_fp32)
.BindInput("Input", .BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA), PRECISION(kInt8))}) {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8),
DATALAYOUT(kAny))})
.BindOutput("Out", .BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA), PRECISION(kFloat))}) {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kAny))})
.Finalize(); .Finalize();
REGISTER_LITE_KERNEL(calib_once, REGISTER_LITE_KERNEL(calib_once,
kCUDA, kCUDA,
kInt8, kFloat,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::CalibComputeFp32ToInt8, paddle::lite::kernels::cuda::CalibComputeFp32ToInt8,
fp32_to_int8) fp32_to_int8)
.BindInput("Input", .BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA), PRECISION(kFloat))}) {LiteType::GetTensorTy(TARGET(kCUDA),
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA), PRECISION(kInt8))}) PRECISION(kFloat),
DATALAYOUT(kAny))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8),
DATALAYOUT(kAny))})
.Finalize(); .Finalize();
REGISTER_LITE_KERNEL(calib_once, REGISTER_LITE_KERNEL(calib_once,
kCUDA, kCUDA,
kInt8, kFloat,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::CalibComputeInt8ToFp32, paddle::lite::kernels::cuda::CalibComputeInt8ToFp32,
int8_to_fp32) int8_to_fp32)
.BindInput("Input", .BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA), PRECISION(kInt8))}) {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8),
DATALAYOUT(kAny))})
.BindOutput("Out", .BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA), PRECISION(kFloat))}) {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kAny))})
.Finalize(); .Finalize();
...@@ -23,7 +23,7 @@ namespace kernels { ...@@ -23,7 +23,7 @@ namespace kernels {
namespace cuda { namespace cuda {
class CalibComputeFp32ToInt8 class CalibComputeFp32ToInt8
: public KernelLite<TARGET(kCUDA), PRECISION(kInt8)> { : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> {
public: public:
using param_t = operators::CalibParam; using param_t = operators::CalibParam;
...@@ -35,7 +35,7 @@ class CalibComputeFp32ToInt8 ...@@ -35,7 +35,7 @@ class CalibComputeFp32ToInt8
}; };
class CalibComputeInt8ToFp32 class CalibComputeInt8ToFp32
: public KernelLite<TARGET(kCUDA), PRECISION(kInt8)> { : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> {
public: public:
using param_t = operators::CalibParam; using param_t = operators::CalibParam;
......
...@@ -171,6 +171,3 @@ TEST(calib_cuda, fp32_to_int8) { ...@@ -171,6 +171,3 @@ TEST(calib_cuda, fp32_to_int8) {
} // namespace kernels } // namespace kernels
} // namespace lite } // namespace lite
} // namespace paddle } // namespace paddle
USE_LITE_KERNEL(calib, kCUDA, kInt8, kNCHW, int8_to_fp32);
USE_LITE_KERNEL(calib, kCUDA, kInt8, kNCHW, fp32_to_int8);
...@@ -41,14 +41,15 @@ __global__ void Concat(const int num, ...@@ -41,14 +41,15 @@ __global__ void Concat(const int num,
} }
} }
void ConcatCompute::Run() { template <typename Dtype>
void ConcatCompute<Dtype>::Run() {
auto& param = this->Param<param_t>(); auto& param = this->Param<param_t>();
auto& ctx = this->ctx_->template As<CUDAContext>(); auto& ctx = this->ctx_->template As<CUDAContext>();
auto stream = ctx.exec_stream(); auto stream = ctx.exec_stream();
std::vector<Tensor*> input = param.x; std::vector<Tensor*> input = param.x;
Tensor* output = param.output; Tensor* output = param.output;
auto* output_data = output->mutable_data<float>(TARGET(kCUDA)); auto* output_data = output->mutable_data<Dtype>(TARGET(kCUDA));
int axis = param.axis; int axis = param.axis;
int inner_size = 1; int inner_size = 1;
int outer_size = 1; int outer_size = 1;
...@@ -66,7 +67,7 @@ void ConcatCompute::Run() { ...@@ -66,7 +67,7 @@ void ConcatCompute::Run() {
int offset_concat_axis = 0; int offset_concat_axis = 0;
for (int i = 0; i < in_num; i++) { for (int i = 0; i < in_num; i++) {
auto* input_data = input[i]->data<float>(); auto* input_data = input[i]->data<Dtype>();
int input_concat_axis = input[i]->dims()[axis]; int input_concat_axis = input[i]->dims()[axis];
int input_concat_size = input_concat_axis * inner_size; int input_concat_size = input_concat_axis * inner_size;
int num = input_concat_size * outer_size; int num = input_concat_size * outer_size;
...@@ -93,7 +94,7 @@ REGISTER_LITE_KERNEL(concat, ...@@ -93,7 +94,7 @@ REGISTER_LITE_KERNEL(concat,
kCUDA, kCUDA,
kFloat, kFloat,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::ConcatCompute, paddle::lite::kernels::cuda::ConcatCompute<float>,
def) def)
.BindInput("X", {LiteType::GetTensorTy(TARGET(kCUDA))}) .BindInput("X", {LiteType::GetTensorTy(TARGET(kCUDA))})
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA))})
......
...@@ -20,7 +20,9 @@ namespace lite { ...@@ -20,7 +20,9 @@ namespace lite {
namespace kernels { namespace kernels {
namespace cuda { namespace cuda {
class ConcatCompute : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> { template <typename Dtype>
class ConcatCompute
: public KernelLite<TARGET(kCUDA), PRECISION(kFloat), DATALAYOUT(kNCHW)> {
public: public:
using param_t = operators::ConcatParam; using param_t = operators::ConcatParam;
...@@ -28,6 +30,16 @@ class ConcatCompute : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> { ...@@ -28,6 +30,16 @@ class ConcatCompute : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> {
virtual ~ConcatCompute() = default; virtual ~ConcatCompute() = default;
}; };
template <typename Dtype>
class ConcatComputeNHWC
: public KernelLite<TARGET(kCUDA), PRECISION(kFloat), DATALAYOUT(kNHWC)> {
public:
using param_t = operators::ConcatParam;
void Run() override {}
virtual ~ConcatComputeNHWC() = default;
};
} // namespace cuda } // namespace cuda
} // namespace kernels } // namespace kernels
} // namespace lite } // namespace lite
......
...@@ -92,13 +92,13 @@ void concat_compute_ref(const operators::ConcatParam& param) { ...@@ -92,13 +92,13 @@ void concat_compute_ref(const operators::ConcatParam& param) {
} }
TEST(concat, init) { TEST(concat, init) {
ConcatCompute concat; ConcatCompute<float> concat;
ASSERT_EQ(concat.precision(), PRECISION(kFloat)); ASSERT_EQ(concat.precision(), PRECISION(kFloat));
ASSERT_EQ(concat.target(), TARGET(kCUDA)); ASSERT_EQ(concat.target(), TARGET(kCUDA));
} }
TEST(concat, compute_input_multi) { TEST(concat, compute_input_multi) {
ConcatCompute concat_kernel; ConcatCompute<float> concat_kernel;
std::unique_ptr<KernelContext> ctx(new KernelContext); std::unique_ptr<KernelContext> ctx(new KernelContext);
auto& context = ctx->As<CUDAContext>(); auto& context = ctx->As<CUDAContext>();
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
// limitations under the License. // limitations under the License.
#include "lite/kernels/cuda/conv_compute.h" #include "lite/kernels/cuda/conv_compute.h"
#include <vector>
#include "lite/core/op_registry.h" #include "lite/core/op_registry.h"
namespace paddle { namespace paddle {
...@@ -20,6 +21,15 @@ namespace lite { ...@@ -20,6 +21,15 @@ namespace lite {
namespace kernels { namespace kernels {
namespace cuda { namespace cuda {
inline int ConvOutputSize(
int input_size, int filter_size, int dilation, int padding, int stride) {
const int dkernel = dilation * (filter_size - 1) + 1;
int output_size = (input_size + 2 * padding - dkernel) / stride + 1;
CHECK_GT_OR_FALSE(output_size, 0);
return output_size;
}
void ConvCompute::PrepareForRun() { void ConvCompute::PrepareForRun() {
auto& param = this->Param<param_t>(); auto& param = this->Param<param_t>();
auto& ctx = this->ctx_->template As<CUDAContext>(); auto& ctx = this->ctx_->template As<CUDAContext>();
...@@ -35,6 +45,21 @@ void ConvCompute::Run() { ...@@ -35,6 +45,21 @@ void ConvCompute::Run() {
template <PrecisionType Ptype_out> template <PrecisionType Ptype_out>
void ConvComputeInt8<Ptype_out>::PrepareForRun() { void ConvComputeInt8<Ptype_out>::PrepareForRun() {
auto& param = this->Param<param_t>(); auto& param = this->Param<param_t>();
const auto in_dims = param.x->dims();
const auto filter_dims = param.filter->dims();
std::vector<int64_t> output_shape({in_dims[0]});
for (size_t i = 0; i < param.strides.size(); ++i) {
output_shape.push_back(ConvOutputSize(in_dims[i + 1],
filter_dims[i + 1],
param.dilations[i],
param.paddings[i],
param.strides[i]));
}
output_shape.push_back(filter_dims[0]);
param.output->Resize(lite::DDim(output_shape));
auto& ctx = this->ctx_->template As<CUDAContext>(); auto& ctx = this->ctx_->template As<CUDAContext>();
conv_impl_.reset(new lite::cuda::math::CudnnConv2DInt8<Ptype_out>); conv_impl_.reset(new lite::cuda::math::CudnnConv2DInt8<Ptype_out>);
conv_impl_->init(param, &ctx); conv_impl_->init(param, &ctx);
...@@ -43,6 +68,20 @@ void ConvComputeInt8<Ptype_out>::PrepareForRun() { ...@@ -43,6 +68,20 @@ void ConvComputeInt8<Ptype_out>::PrepareForRun() {
template <PrecisionType Ptype_out> template <PrecisionType Ptype_out>
void ConvComputeInt8<Ptype_out>::Run() { void ConvComputeInt8<Ptype_out>::Run() {
auto& param = this->Param<param_t>(); auto& param = this->Param<param_t>();
const auto in_dims = param.x->dims();
const auto filter_dims = param.filter->dims();
std::vector<int64_t> output_shape({in_dims[0]});
for (size_t i = 0; i < param.strides.size(); ++i) {
output_shape.push_back(ConvOutputSize(in_dims[i + 1],
filter_dims[i + 1],
param.dilations[i],
param.paddings[i],
param.strides[i]));
}
output_shape.push_back(filter_dims[0]);
param.output->Resize(lite::DDim(output_shape));
conv_impl_->run(param); conv_impl_->run(param);
} }
......
...@@ -35,7 +35,8 @@ class ConvCompute : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> { ...@@ -35,7 +35,8 @@ class ConvCompute : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> {
}; };
template <PrecisionType Ptype_out> template <PrecisionType Ptype_out>
class ConvComputeInt8 : public KernelLite<TARGET(kCUDA), PRECISION(kInt8)> { class ConvComputeInt8
: public KernelLite<TARGET(kCUDA), PRECISION(kInt8), DATALAYOUT(kNHWC)> {
public: public:
using param_t = operators::ConvParam; using param_t = operators::ConvParam;
......
...@@ -105,7 +105,6 @@ TEST(conv_compute, fp32) { ...@@ -105,7 +105,6 @@ TEST(conv_compute, fp32) {
LOG(INFO) << y_cpu_data[i]; LOG(INFO) << y_cpu_data[i];
} }
} }
/*
TEST(conv_compute, int8) { TEST(conv_compute, int8) {
ConvComputeInt8<PRECISION(kFloat)> int8_conv_fp32out; ConvComputeInt8<PRECISION(kFloat)> int8_conv_fp32out;
...@@ -246,7 +245,6 @@ TEST(conv_compute, int8_int8_out) { ...@@ -246,7 +245,6 @@ TEST(conv_compute, int8_int8_out) {
LOG(INFO) << float(y_cpu_data[i]); LOG(INFO) << float(y_cpu_data[i]);
} }
} }
*/
} // namespace cuda } // namespace cuda
} // namespace kernels } // namespace kernels
......
...@@ -11,6 +11,7 @@ limitations under the License. */ ...@@ -11,6 +11,7 @@ limitations under the License. */
#pragma once #pragma once
#include <vector> #include <vector>
#include "lite/backends/cuda/math/elementwise.h"
#include "lite/core/op_registry.h" #include "lite/core/op_registry.h"
#include "lite/kernels/cuda/elementwise_add_compute.h" #include "lite/kernels/cuda/elementwise_add_compute.h"
...@@ -19,22 +20,35 @@ namespace lite { ...@@ -19,22 +20,35 @@ namespace lite {
namespace kernels { namespace kernels {
namespace cuda { namespace cuda {
__global__ void KeElementwiseAdd(const float* x_data, void ElementwiseAddCompute::Run() {
const float* y_data, auto& param = this->Param<param_t>();
float* out_data, auto& ctx = this->ctx_->template As<CUDAContext>();
const size_t total) { auto stream = ctx.exec_stream();
int tid = blockIdx.x * blockDim.x + threadIdx.x;
int stride = blockDim.x * gridDim.x; const lite::Tensor* x = param.X;
for (; tid < total; tid += stride) { const lite::Tensor* y = param.Y;
#if __CUDA_ARCH__ >= 350 lite::Tensor* out = param.Out;
out_data[tid] = __ldg(x_data + tid) + __ldg(y_data + tid);
#else CHECK(x->dims() == y->dims());
out_data[tid] = x_data[tid] + y_data[tid];
#endif const int n = x->dims()[0];
} const int c = x->dims()[1];
const int h = x->dims()[2];
const int w = x->dims()[3];
auto* x_data = x->data<float>();
auto* y_data = y->data<float>();
auto out_data = out->mutable_data<float>(TARGET(kCUDA));
int pixel_num = x->numel();
lite::cuda::math::elementwise_add(
pixel_num, x_data, y_data, out_data, stream);
cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) LOG(INFO) << cudaGetErrorString(error);
} }
void ElementwiseAddCompute::Run() { void ElementwiseAddComputeNHWC::Run() {
auto& param = this->Param<param_t>(); auto& param = this->Param<param_t>();
auto& ctx = this->ctx_->template As<CUDAContext>(); auto& ctx = this->ctx_->template As<CUDAContext>();
auto stream = ctx.exec_stream(); auto stream = ctx.exec_stream();
...@@ -55,12 +69,44 @@ void ElementwiseAddCompute::Run() { ...@@ -55,12 +69,44 @@ void ElementwiseAddCompute::Run() {
auto out_data = out->mutable_data<float>(TARGET(kCUDA)); auto out_data = out->mutable_data<float>(TARGET(kCUDA));
int pixel_num = x->numel(); int pixel_num = x->numel();
int threads = 1024; lite::cuda::math::elementwise_add(
int blocks = (pixel_num + threads - 1) / threads; pixel_num, x_data, y_data, out_data, stream);
blocks = blocks > 8 ? 8 : blocks;
KeElementwiseAdd<<<blocks, threads, 0, stream>>>( cudaError_t error = cudaGetLastError();
x_data, y_data, out_data, pixel_num); if (error != cudaSuccess) LOG(INFO) << cudaGetErrorString(error);
}
void ElementwiseAddComputeInt8::Run() {
auto& param = this->Param<param_t>();
auto& ctx = this->ctx_->template As<CUDAContext>();
auto stream = ctx.exec_stream();
const lite::Tensor* x = param.X;
const lite::Tensor* y = param.Y;
lite::Tensor* out = param.Out;
CHECK(x->dims() == y->dims());
const int c = x->dims()[3];
auto* x_data = x->data<float>();
auto* y_data = y->data<float>();
auto out_data = out->mutable_data<int8_t>(TARGET(kCUDA));
int pixel_num = x->numel();
float output_scale = param.output_scale;
if (c % 4 == 0) {
lite::cuda::math::elementwise_add_nhwc4_int8(
pixel_num / 4,
static_cast<const void*>(x_data),
static_cast<const void*>(y_data),
1. / output_scale,
static_cast<void*>(out_data),
stream);
} else {
lite::cuda::math::elementwise_add_int8(
pixel_num, x_data, y_data, 1. / output_scale, out_data, stream);
}
cudaError_t error = cudaGetLastError(); cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) LOG(INFO) << cudaGetErrorString(error); if (error != cudaSuccess) LOG(INFO) << cudaGetErrorString(error);
...@@ -81,3 +127,23 @@ REGISTER_LITE_KERNEL(elementwise_add, ...@@ -81,3 +127,23 @@ REGISTER_LITE_KERNEL(elementwise_add,
.BindInput("Y", {LiteType::GetTensorTy(TARGET(kCUDA))}) .BindInput("Y", {LiteType::GetTensorTy(TARGET(kCUDA))})
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA))}) .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA))})
.Finalize(); .Finalize();
REGISTER_LITE_KERNEL(elementwise_add,
kCUDA,
kFloat,
kNHWC,
paddle::lite::kernels::cuda::ElementwiseAddComputeNHWC,
nhwc_format)
.BindInput("X",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNHWC))})
.BindInput("Y",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNHWC))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNHWC))})
.Finalize();
...@@ -29,6 +29,24 @@ class ElementwiseAddCompute ...@@ -29,6 +29,24 @@ class ElementwiseAddCompute
virtual ~ElementwiseAddCompute() = default; virtual ~ElementwiseAddCompute() = default;
}; };
class ElementwiseAddComputeNHWC
: public KernelLite<TARGET(kCUDA), PRECISION(kFloat), DATALAYOUT(kNHWC)> {
public:
using param_t = operators::ElementwiseParam;
void Run() override;
virtual ~ElementwiseAddComputeNHWC() = default;
};
class ElementwiseAddComputeInt8
: public KernelLite<TARGET(kCUDA), PRECISION(kFloat), DATALAYOUT(kNHWC)> {
public:
using param_t = operators::ElementwiseParam;
void Run() override;
virtual ~ElementwiseAddComputeInt8() = default;
};
} // namespace cuda } // namespace cuda
} // namespace kernels } // namespace kernels
} // namespace lite } // namespace lite
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <gtest/gtest.h> #include <gtest/gtest.h>
#include <memory> #include <memory>
#include <utility> #include <utility>
#include "lite/api/test_helper.h"
namespace paddle { namespace paddle {
namespace lite { namespace lite {
...@@ -98,6 +99,67 @@ TEST(elementwise_add, normal) { ...@@ -98,6 +99,67 @@ TEST(elementwise_add, normal) {
} }
} }
TEST(elementwise_add, int8_out) {
ElementwiseAddComputeInt8 elementwise_add_kernel;
std::unique_ptr<KernelContext> ctx(new KernelContext);
auto& context = ctx->As<CUDAContext>();
operators::ElementwiseParam param;
Tensor x, y, out;
Tensor x_cpu, y_cpu, out_cpu;
const int n = 1;
const int h = 36;
const int w = 36;
const int c = 125;
x.Resize({n, h, w, c});
y.Resize({n, h, w, c});
out.Resize({n, h, w, c});
x_cpu.Resize({n, h, w, c});
y_cpu.Resize({n, h, w, c});
out_cpu.Resize({n, h, w, c});
auto* out_data = out.mutable_data<int8_t>(TARGET(kCUDA));
auto* x_cpu_data = x_cpu.mutable_data<float>();
auto* y_cpu_data = y_cpu.mutable_data<float>();
auto* out_cpu_data = out_cpu.mutable_data<int8_t>();
for (int i = 0; i < x_cpu.numel(); ++i) {
x_cpu_data[i] = i + 5.0;
}
for (int i = 0; i < y_cpu.numel(); ++i) {
y_cpu_data[i] = i;
}
x.Assign<float, lite::DDim, TARGET(kCUDA)>(x_cpu_data, x_cpu.dims());
y.Assign<float, lite::DDim, TARGET(kCUDA)>(y_cpu_data, y_cpu.dims());
param.X = &x;
param.Y = &y;
param.Out = &out;
param.output_scale = 50 / 127.;
elementwise_add_kernel.SetParam(param);
cudaStream_t stream;
cudaStreamCreate(&stream);
context.SetExecStream(stream);
elementwise_add_kernel.SetContext(std::move(ctx));
auto start = GetCurrentUS();
for (int i = 0; i < 1000000; i++) {
elementwise_add_kernel.Launch();
}
LOG(INFO) << "time: " << (GetCurrentUS() - start) / 1000000.;
CopySync<TARGET(kCUDA)>(
out_cpu_data, out_data, sizeof(int8_t) * out.numel(), IoDirection::DtoH);
for (int i = 0; i < out.numel(); i++) {
// LOG(INFO) << float(out_cpu_data[i]);
}
}
} // namespace cuda } // namespace cuda
} // namespace kernels } // namespace kernels
} // namespace lite } // namespace lite
......
...@@ -45,7 +45,7 @@ void FeedCompute::Run() { ...@@ -45,7 +45,7 @@ void FeedCompute::Run() {
REGISTER_LITE_KERNEL( REGISTER_LITE_KERNEL(
feed, kCUDA, kFloat, kNCHW, paddle::lite::kernels::cuda::FeedCompute, nchw) feed, kCUDA, kFloat, kNCHW, paddle::lite::kernels::cuda::FeedCompute, nchw)
.BindInput("X", .BindInput("X",
{LiteType::GetTensorTy(TARGET(kCUDA), {LiteType::GetTensorTy(TARGET(kHost),
PRECISION(kFloat), PRECISION(kFloat),
DATALAYOUT(kNCHW))}) DATALAYOUT(kNCHW))})
.BindOutput("Out", .BindOutput("Out",
...@@ -57,7 +57,7 @@ REGISTER_LITE_KERNEL( ...@@ -57,7 +57,7 @@ REGISTER_LITE_KERNEL(
REGISTER_LITE_KERNEL( REGISTER_LITE_KERNEL(
feed, kCUDA, kFloat, kNHWC, paddle::lite::kernels::cuda::FeedCompute, nhwc) feed, kCUDA, kFloat, kNHWC, paddle::lite::kernels::cuda::FeedCompute, nhwc)
.BindInput("X", .BindInput("X",
{LiteType::GetTensorTy(TARGET(kCUDA), {LiteType::GetTensorTy(TARGET(kHost),
PRECISION(kFloat), PRECISION(kFloat),
DATALAYOUT(kNHWC))}) DATALAYOUT(kNHWC))})
.BindOutput("Out", .BindOutput("Out",
......
...@@ -108,8 +108,14 @@ REGISTER_LITE_KERNEL(io_copy, ...@@ -108,8 +108,14 @@ REGISTER_LITE_KERNEL(io_copy,
kAny, kAny,
paddle::lite::kernels::cuda::IoCopyHostToCudaCompute, paddle::lite::kernels::cuda::IoCopyHostToCudaCompute,
host_to_device) host_to_device)
.BindInput("Input", {LiteType::GetTensorTy(TARGET(kHost))}) .BindInput("Input",
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA))}) {LiteType::GetTensorTy(TARGET(kHost),
PRECISION(kAny),
DATALAYOUT(kAny))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kAny),
DATALAYOUT(kAny))})
.Finalize(); .Finalize();
REGISTER_LITE_KERNEL(io_copy, REGISTER_LITE_KERNEL(io_copy,
...@@ -118,8 +124,14 @@ REGISTER_LITE_KERNEL(io_copy, ...@@ -118,8 +124,14 @@ REGISTER_LITE_KERNEL(io_copy,
kAny, kAny,
paddle::lite::kernels::cuda::IoCopyCudaToHostCompute, paddle::lite::kernels::cuda::IoCopyCudaToHostCompute,
device_to_host) device_to_host)
.BindInput("Input", {LiteType::GetTensorTy(TARGET(kCUDA))}) .BindInput("Input",
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kHost))}) {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kAny),
DATALAYOUT(kAny))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kHost),
PRECISION(kAny),
DATALAYOUT(kAny))})
.Finalize(); .Finalize();
REGISTER_LITE_KERNEL(io_copy_once, REGISTER_LITE_KERNEL(io_copy_once,
...@@ -128,8 +140,14 @@ REGISTER_LITE_KERNEL(io_copy_once, ...@@ -128,8 +140,14 @@ REGISTER_LITE_KERNEL(io_copy_once,
kAny, kAny,
paddle::lite::kernels::cuda::IoCopyHostToCudaCompute, paddle::lite::kernels::cuda::IoCopyHostToCudaCompute,
host_to_device) host_to_device)
.BindInput("Input", {LiteType::GetTensorTy(TARGET(kHost))}) .BindInput("Input",
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA))}) {LiteType::GetTensorTy(TARGET(kHost),
PRECISION(kAny),
DATALAYOUT(kAny))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kAny),
DATALAYOUT(kAny))})
.Finalize(); .Finalize();
REGISTER_LITE_KERNEL(io_copy_once, REGISTER_LITE_KERNEL(io_copy_once,
...@@ -138,6 +156,12 @@ REGISTER_LITE_KERNEL(io_copy_once, ...@@ -138,6 +156,12 @@ REGISTER_LITE_KERNEL(io_copy_once,
kAny, kAny,
paddle::lite::kernels::cuda::IoCopyCudaToHostCompute, paddle::lite::kernels::cuda::IoCopyCudaToHostCompute,
device_to_host) device_to_host)
.BindInput("Input", {LiteType::GetTensorTy(TARGET(kCUDA))}) .BindInput("Input",
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kHost))}) {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kAny),
DATALAYOUT(kAny))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kHost),
PRECISION(kAny),
DATALAYOUT(kAny))})
.Finalize(); .Finalize();
...@@ -21,42 +21,43 @@ namespace lite { ...@@ -21,42 +21,43 @@ namespace lite {
namespace kernels { namespace kernels {
namespace cuda { namespace cuda {
template <typename Dtype> #define NCHWTONHWC(type) \
void NCHWToNHWCCompute<Dtype>::Run() { auto& param = this->template Param<param_t>(); \
auto& param = this->template Param<param_t>(); auto& ctx = this->ctx_->template As<CUDAContext>(); \
auto& ctx = this->ctx_->template As<CUDAContext>(); auto input = param.x->template data<type>(); \
auto input = param.x->template data<Dtype>(); auto input_dim = param.x->dims(); \
auto input_dim = param.x->dims(); CHECK(input_dim.size() == 4) \
CHECK(input_dim.size() == 4) << "NCHW to NHWC should guarantee that the input dims should be 4"; \
<< "NCHW to NHWC should guarantee that the input dims should be 4"; int n = input_dim[0]; \
auto output = param.y->template mutable_data<Dtype>(TARGET(kCUDA)); int c = input_dim[1]; \
int h = input_dim[2]; \
int n = input_dim[0]; int w = input_dim[3]; \
int c = input_dim[1]; param.y->Resize({n, h, w, c}); \
int h = input_dim[2]; auto output = param.y->template mutable_data<type>(TARGET(kCUDA)); \
int w = input_dim[3]; lite::cuda::math::NCHW2NHWC<type>(n, c, h * w, input, output, &ctx);
lite::cuda::math::NCHW2NHWC<Dtype>(n, c, h * w, input, output, &ctx); #define NHWCTONCHW(type) \
} auto& param = this->template Param<param_t>(); \
auto& ctx = this->ctx_->template As<CUDAContext>(); \
template <typename Dtype> auto input = param.x->template data<type>(); \
void NHWCToNCHWCompute<Dtype>::Run() { auto input_dim = param.x->dims(); \
auto& param = this->template Param<param_t>(); CHECK(input_dim.size() == 4) \
auto& ctx = this->ctx_->template As<CUDAContext>(); << "NHWC to NCHW should guarantee that the input dims should be 4"; \
int n = input_dim[0]; \
auto input = param.x->template data<Dtype>(); int h = input_dim[1]; \
auto output = param.y->template mutable_data<Dtype>(TARGET(kCUDA)); int w = input_dim[2]; \
int c = input_dim[3]; \
auto input_dim = param.x->dims(); param.y->Resize({n, c, h, w}); \
CHECK(input_dim.size() == 4) auto output = param.y->template mutable_data<type>(TARGET(kCUDA)); \
<< "NHWC to NCHW should guarantee that the input dims should be 4"; lite::cuda::math::NHWC2NCHW<type>(n, c, h * w, input, output, &ctx);
int n = input_dim[0]; void NCHWToNHWCCompute::Run() { NCHWTONHWC(float) }
int h = input_dim[1];
int w = input_dim[2]; void NCHWToNHWCComputeInt8::Run() { NCHWTONHWC(int8_t) }
int c = input_dim[3];
lite::cuda::math::NHWC2NCHW<Dtype>(n, c, h * w, input, output, &ctx); void NHWCToNCHWCompute::Run() { NHWCTONCHW(float) }
}
void NHWCToNCHWComputeInt8::Run() { NHWCTONCHW(int8_t) }
} // namespace cuda } // namespace cuda
} // namespace kernels } // namespace kernels
...@@ -67,9 +68,9 @@ REGISTER_LITE_KERNEL(layout, ...@@ -67,9 +68,9 @@ REGISTER_LITE_KERNEL(layout,
kCUDA, kCUDA,
kFloat, kFloat,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::NCHWToNHWCCompute<float>, paddle::lite::kernels::cuda::NCHWToNHWCCompute,
nchw2nhwc) nchw2nhwc)
.BindInput("X", .BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA), {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat), PRECISION(kFloat),
DATALAYOUT(kNCHW))}) DATALAYOUT(kNCHW))})
...@@ -82,10 +83,10 @@ REGISTER_LITE_KERNEL(layout, ...@@ -82,10 +83,10 @@ REGISTER_LITE_KERNEL(layout,
REGISTER_LITE_KERNEL(layout, REGISTER_LITE_KERNEL(layout,
kCUDA, kCUDA,
kFloat, kFloat,
kNHWC, kNCHW,
paddle::lite::kernels::cuda::NHWCToNCHWCompute<float>, paddle::lite::kernels::cuda::NHWCToNCHWCompute,
nhwc2nchw) nhwc2nchw)
.BindInput("X", .BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA), {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat), PRECISION(kFloat),
DATALAYOUT(kNHWC))}) DATALAYOUT(kNHWC))})
...@@ -99,9 +100,9 @@ REGISTER_LITE_KERNEL(layout, ...@@ -99,9 +100,9 @@ REGISTER_LITE_KERNEL(layout,
kCUDA, kCUDA,
kInt8, kInt8,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::NCHWToNHWCCompute<int8_t>, paddle::lite::kernels::cuda::NCHWToNHWCComputeInt8,
nchw2nhwc) int8_nchw2nhwc)
.BindInput("X", .BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA), {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8), PRECISION(kInt8),
DATALAYOUT(kNCHW))}) DATALAYOUT(kNCHW))})
...@@ -114,10 +115,74 @@ REGISTER_LITE_KERNEL(layout, ...@@ -114,10 +115,74 @@ REGISTER_LITE_KERNEL(layout,
REGISTER_LITE_KERNEL(layout, REGISTER_LITE_KERNEL(layout,
kCUDA, kCUDA,
kInt8, kInt8,
kNHWC, kNCHW,
paddle::lite::kernels::cuda::NHWCToNCHWCompute<int8_t>, paddle::lite::kernels::cuda::NHWCToNCHWComputeInt8,
int8_nhwc2nchw)
.BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8),
DATALAYOUT(kNHWC))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8),
DATALAYOUT(kNCHW))})
.Finalize();
REGISTER_LITE_KERNEL(layout_once,
kCUDA,
kFloat,
kNCHW,
paddle::lite::kernels::cuda::NCHWToNHWCCompute,
nchw2nhwc)
.BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNCHW))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNHWC))})
.Finalize();
REGISTER_LITE_KERNEL(layout_once,
kCUDA,
kFloat,
kNCHW,
paddle::lite::kernels::cuda::NHWCToNCHWCompute,
nhwc2nchw) nhwc2nchw)
.BindInput("X", .BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNHWC))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNCHW))})
.Finalize();
REGISTER_LITE_KERNEL(layout_once,
kCUDA,
kInt8,
kNCHW,
paddle::lite::kernels::cuda::NCHWToNHWCComputeInt8,
int8_nchw2nhwc)
.BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8),
DATALAYOUT(kNCHW))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8),
DATALAYOUT(kNHWC))})
.Finalize();
REGISTER_LITE_KERNEL(layout_once,
kCUDA,
kInt8,
kNCHW,
paddle::lite::kernels::cuda::NHWCToNCHWComputeInt8,
int8_nhwc2nchw)
.BindInput("Input",
{LiteType::GetTensorTy(TARGET(kCUDA), {LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kInt8), PRECISION(kInt8),
DATALAYOUT(kNHWC))}) DATALAYOUT(kNHWC))})
......
...@@ -20,30 +20,36 @@ namespace lite { ...@@ -20,30 +20,36 @@ namespace lite {
namespace kernels { namespace kernels {
namespace cuda { namespace cuda {
template <typename Dtype> class NCHWToNHWCCompute : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> {
class LayOutCompute : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> {
public: public:
using param_t = operators::LayoutParam; using param_t = operators::LayoutParam;
void Run() override; void Run() override;
virtual ~LayOutCompute() = default; virtual ~NCHWToNHWCCompute() = default;
}; };
template <typename Dtype> class NCHWToNHWCComputeInt8
class NCHWToNHWCCompute : public LayOutCompute<Dtype> { : public KernelLite<TARGET(kCUDA), PRECISION(kInt8)> {
public: public:
using param_t = operators::LayoutParam; using param_t = operators::LayoutParam;
void Run() override; void Run() override;
virtual ~NCHWToNHWCCompute() = default; virtual ~NCHWToNHWCComputeInt8() = default;
}; };
template <typename Dtype> class NHWCToNCHWCompute : public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> {
class NHWCToNCHWCompute : public LayOutCompute<Dtype> {
public: public:
using param_t = operators::LayoutParam; using param_t = operators::LayoutParam;
void Run() override; void Run() override;
virtual ~NHWCToNCHWCompute() = default; virtual ~NHWCToNCHWCompute() = default;
}; };
class NHWCToNCHWComputeInt8
: public KernelLite<TARGET(kCUDA), PRECISION(kInt8)> {
public:
using param_t = operators::LayoutParam;
void Run() override;
virtual ~NHWCToNCHWComputeInt8() = default;
};
} // namespace cuda } // namespace cuda
} // namespace kernels } // namespace kernels
} // namespace lite } // namespace lite
......
// Copyright (c) 2019 PaddlePaddle Authors. All Rights Reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "lite/kernels/cuda/layout_compute.h"
#include <gtest/gtest.h>
#include <memory>
#include <utility>
namespace paddle {
namespace lite {
namespace kernels {
namespace cuda {
#define IN(n, c, h, w) \
input_data[w + h * input_w + c * input_h * input_w + \
n * input_c * input_h * input_w]
#define OUT(n, c, h, w) \
output_data[w + h * output_w + c * output_h * output_w + \
n * output_c * output_h * output_w]
template <typename Dtype>
void nchw2nhwc_ref(lite::Tensor* input, lite::Tensor* output) {
auto* input_data = input->data<Dtype>();
auto* output_data = output->mutable_data<Dtype>();
int input_n = input->dims()[0];
int input_c = input->dims()[1];
int input_h = input->dims()[2];
int input_w = input->dims()[3];
int output_c = output->dims()[1];
int output_h = output->dims()[2];
int output_w = output->dims()[3];
for (int n = 0; n < input_n; ++n) {
for (int c = 0; c < input_c; ++c) {
for (int h = 0; h < input_h; ++h) {
for (int w = 0; w < input_w; ++w) {
OUT(n, h, w, c) = IN(n, c, h, w);
}
}
}
}
}
#undef IN
#undef OUT
#define IN(n, h, w, c) \
input_data[c + w * input_c + h * input_w * input_c + \
n * input_h * input_w * input_c]
#define OUT(n, h, w, c) \
output_data[c + w * output_c + h * output_w * output_c + \
n * output_h * output_w * output_c]
template <typename Dtype>
void nhwc2nchw_ref(lite::Tensor* input, lite::Tensor* output) {
auto* input_data = input->data<Dtype>();
auto* output_data = output->mutable_data<Dtype>();
int input_n = input->dims()[0];
int input_h = input->dims()[1];
int input_w = input->dims()[2];
int input_c = input->dims()[3];
int output_h = output->dims()[1];
int output_w = output->dims()[2];
int output_c = output->dims()[3];
for (int n = 0; n < input_n; ++n) {
for (int c = 0; c < input_c; ++c) {
for (int h = 0; h < input_h; ++h) {
for (int w = 0; w < input_w; ++w) {
OUT(n, c, h, w) = IN(n, h, w, c);
}
}
}
}
}
template <typename Dtype>
void test_reformat(LayOutCompute<Dtype>* layout_kernel, bool nchw2nhwc) {
std::unique_ptr<KernelContext> ctx(new KernelContext);
auto& context = ctx->As<CUDAContext>();
operators::LayoutParam param;
lite::Tensor x, x_cpu, x_ref;
lite::Tensor out, out_cpu, out_ref;
int N = 5, C = 6, H = 7, W = 8;
if (nchw2nhwc) {
x.Resize({N, C, H, W});
out.Resize({N, H, W, C});
x_cpu.Resize({N, C, H, W});
out_cpu.Resize({N, H, W, C});
x_ref.Resize({N, C, H, W});
out_ref.Resize({N, H, W, C});
} else {
x.Resize({N, H, W, C});
out.Resize({N, C, H, W});
x_cpu.Resize({N, H, W, C});
out_cpu.Resize({N, C, H, W});
x_ref.Resize({N, H, W, C});
out_ref.Resize({N, C, H, W});
}
auto* x_cpu_data = x_cpu.mutable_data<Dtype>();
auto* out_cpu_data = out_cpu.mutable_data<Dtype>();
auto* x_ref_data = x_ref.mutable_data<Dtype>();
for (int i = 0; i < x_cpu.numel(); ++i) {
x_cpu_data[i] = static_cast<Dtype>((i + 1) % 127);
x_ref_data[i] = static_cast<Dtype>((i + 1) % 127);
}
x.Assign<Dtype, lite::DDim, TARGET(kCUDA)>(x_cpu_data, x_cpu.dims());
param.x = &x;
param.y = &out;
cudaStream_t stream;
cudaStreamCreate(&stream);
context.SetExecStream(stream);
layout_kernel->SetParam(param);
layout_kernel->SetContext(std::move(ctx));
layout_kernel->Launch();
cudaDeviceSynchronize();
auto* out_data = out.mutable_data<Dtype>(TARGET(kCUDA));
CopySync<TARGET(kCUDA)>(
out_cpu_data, out_data, sizeof(Dtype) * out.numel(), IoDirection::DtoH);
if (nchw2nhwc) {
nchw2nhwc_ref<Dtype>(&x_ref, &out_ref);
} else {
nhwc2nchw_ref<Dtype>(&x_ref, &out_ref);
}
auto* out_ref_data = out_ref.mutable_data<Dtype>();
for (int i = 0; i < out.numel(); i++) {
EXPECT_NEAR(static_cast<float>(out_cpu_data[i]),
static_cast<float>(out_ref_data[i]),
1e-5);
}
}
TEST(normal, nchw2nhwc) {
LayOutCompute<float>* layout_k = new NCHWToNHWCCompute<float>();
test_reformat(layout_k, true);
delete layout_k;
}
/*
TEST(normal, nhwc2nchw) {
LayOutCompute<float> * layout_k = new NHWCToNCHWCompute<float>();
test_reformat(layout_k, false);
delete layout_k;
}
TEST(normal, nchw2nhwcint8) {
LayOutCompute<int8_t> * layout_k = new NCHWToNHWCCompute<int8_t>();
test_reformat(layout_k, true);
delete layout_k;
}
TEST(normal, nhwc2nchwint8) {
LayOutCompute<int8_t> * layout_k = new NHWCToNCHWCompute<int8_t>();
test_reformat(layout_k, false);
delete layout_k;
}
*/
} // namespace cuda
} // namespace kernels
} // namespace lite
} // namespace paddle
...@@ -154,7 +154,16 @@ REGISTER_LITE_KERNEL(nearest_interp, ...@@ -154,7 +154,16 @@ REGISTER_LITE_KERNEL(nearest_interp,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::NearestInterpCompute, paddle::lite::kernels::cuda::NearestInterpCompute,
def) def)
.BindInput("X", {LiteType::GetTensorTy(TARGET(kCUDA))}) .BindInput("X",
.BindInput("OutSize", {LiteType::GetTensorTy(TARGET(kCUDA))}) {LiteType::GetTensorTy(TARGET(kCUDA),
.BindOutput("Out", {LiteType::GetTensorTy(TARGET(kCUDA))}) PRECISION(kFloat),
DATALAYOUT(kNCHW))})
.BindInput("OutSize",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNCHW))})
.BindOutput("Out",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNCHW))})
.Finalize(); .Finalize();
...@@ -21,7 +21,7 @@ namespace kernels { ...@@ -21,7 +21,7 @@ namespace kernels {
namespace cuda { namespace cuda {
class NearestInterpCompute class NearestInterpCompute
: public KernelLite<TARGET(kCUDA), PRECISION(kFloat)> { : public KernelLite<TARGET(kCUDA), PRECISION(kFloat), DATALAYOUT(kNCHW)> {
public: public:
using param_t = operators::InterpolateParam; using param_t = operators::InterpolateParam;
......
...@@ -57,6 +57,8 @@ void TransposeCompute::Run() { ...@@ -57,6 +57,8 @@ void TransposeCompute::Run() {
} }
lite::cuda::math::Transpose(dims, axes, in, out, &ctx); lite::cuda::math::Transpose(dims, axes, in, out, &ctx);
cudaError_t error = cudaGetLastError();
if (error != cudaSuccess) LOG(INFO) << cudaGetErrorString(error);
} }
} // namespace cuda } // namespace cuda
......
...@@ -223,8 +223,20 @@ REGISTER_LITE_KERNEL(yolo_box, ...@@ -223,8 +223,20 @@ REGISTER_LITE_KERNEL(yolo_box,
kNCHW, kNCHW,
paddle::lite::kernels::cuda::YoloBoxCompute, paddle::lite::kernels::cuda::YoloBoxCompute,
def) def)
.BindInput("X", {LiteType::GetTensorTy(TARGET(kCUDA))}) .BindInput("X",
.BindInput("ImgSize", {LiteType::GetTensorTy(TARGET(kCUDA))}) {LiteType::GetTensorTy(TARGET(kCUDA),
.BindOutput("Boxes", {LiteType::GetTensorTy(TARGET(kCUDA))}) PRECISION(kFloat),
.BindOutput("Scores", {LiteType::GetTensorTy(TARGET(kCUDA))}) DATALAYOUT(kNCHW))})
.BindInput("ImgSize",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNCHW))})
.BindOutput("Boxes",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNCHW))})
.BindOutput("Scores",
{LiteType::GetTensorTy(TARGET(kCUDA),
PRECISION(kFloat),
DATALAYOUT(kNCHW))})
.Finalize(); .Finalize();
...@@ -96,7 +96,7 @@ add_operator(beam_search_op extra SRCS beam_search_op.cc DEPS ${op_DEPS}) ...@@ -96,7 +96,7 @@ add_operator(beam_search_op extra SRCS beam_search_op.cc DEPS ${op_DEPS})
add_operator(sequence_pool extra SRCS sequence_pool_op.cc DEPS ${op_DEPS}) add_operator(sequence_pool extra SRCS sequence_pool_op.cc DEPS ${op_DEPS})
add_operator(lod_reset_op extra SRCS lod_reset_op.cc DEPS ${op_DEPS}) add_operator(lod_reset_op extra SRCS lod_reset_op.cc DEPS ${op_DEPS})
add_operator(is_empty extra SRCS is_empty_op.cc DEPS ${op_DEPS}) add_operator(is_empty extra SRCS is_empty_op.cc DEPS ${op_DEPS})
add_operator(slice_op_lite extra SRCS slice_op.cc DEPS ${op_DEPS}) add_operator(slice_op_lite basic SRCS slice_op.cc DEPS ${op_DEPS})
add_operator(write_to_array_op extra SRCS write_to_array_op.cc DEPS ${op_DEPS}) add_operator(write_to_array_op extra SRCS write_to_array_op.cc DEPS ${op_DEPS})
add_operator(topk_op extra SRCS topk_op.cc DEPS ${op_DEPS}) add_operator(topk_op extra SRCS topk_op.cc DEPS ${op_DEPS})
add_operator(increment_op extra SRCS increment_op.cc DEPS ${op_DEPS}) add_operator(increment_op extra SRCS increment_op.cc DEPS ${op_DEPS})
......
...@@ -35,8 +35,8 @@ bool ConvOpLite::CheckShape() const { ...@@ -35,8 +35,8 @@ bool ConvOpLite::CheckShape() const {
CHECK_OR_FALSE(in_dims.size() - param_.strides.size() == 2U); CHECK_OR_FALSE(in_dims.size() - param_.strides.size() == 2U);
CHECK_EQ_OR_FALSE(param_.paddings.size(), param_.strides.size()); CHECK_EQ_OR_FALSE(param_.paddings.size(), param_.strides.size());
CHECK_EQ_OR_FALSE(in_dims[1], filter_dims[1] * param_.groups); // CHECK_EQ_OR_FALSE(in_dims[1], filter_dims[1] * param_.groups);
CHECK_EQ_OR_FALSE(filter_dims[0] % param_.groups, 0); // CHECK_EQ_OR_FALSE(filter_dims[0] % param_.groups, 0);
CHECK_EQ_OR_FALSE(filter_dims.size(), 4UL); CHECK_EQ_OR_FALSE(filter_dims.size(), 4UL);
return true; return true;
...@@ -46,7 +46,7 @@ inline int ConvOutputSize( ...@@ -46,7 +46,7 @@ inline int ConvOutputSize(
int input_size, int filter_size, int dilation, int padding, int stride) { int input_size, int filter_size, int dilation, int padding, int stride) {
const int dkernel = dilation * (filter_size - 1) + 1; const int dkernel = dilation * (filter_size - 1) + 1;
int output_size = (input_size + 2 * padding - dkernel) / stride + 1; int output_size = (input_size + 2 * padding - dkernel) / stride + 1;
CHECK_GT_OR_FALSE(output_size, 0); // CHECK_GT_OR_FALSE(output_size, 0);
return output_size; return output_size;
} }
......
...@@ -329,6 +329,7 @@ struct ElementwiseParam { ...@@ -329,6 +329,7 @@ struct ElementwiseParam {
const lite::Tensor* Y{}; const lite::Tensor* Y{};
lite::Tensor* Out{}; lite::Tensor* Out{};
int axis{-1}; // for broadcasting. int axis{-1}; // for broadcasting.
WITH_INT8_CONFIG
}; };
struct ElementwiseGradParam { struct ElementwiseGradParam {
......
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