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7432e34a
编写于
8月 03, 2018
作者:
qnqinan
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
update format of added fpga ops and kernels
上级
30ca60d7
变更
9
隐藏空白更改
内联
并排
Showing
9 changed file
with
226 addition
and
258 deletion
+226
-258
src/operators/fusion_elementwise_add_relu_op.cpp
src/operators/fusion_elementwise_add_relu_op.cpp
+13
-10
src/operators/fusion_elementwise_add_relu_op.h
src/operators/fusion_elementwise_add_relu_op.h
+22
-21
src/operators/kernel/elementwise_add_relu_kernel.h
src/operators/kernel/elementwise_add_relu_kernel.h
+12
-12
src/operators/kernel/fpga/dropout_kernel.cpp
src/operators/kernel/fpga/dropout_kernel.cpp
+18
-18
src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp
src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp
+43
-41
src/operators/kernel/fpga/fc_relu_kernel.cpp
src/operators/kernel/fpga/fc_relu_kernel.cpp
+43
-43
src/operators/kernel/fpga/fusion_fc_kernel.cpp
src/operators/kernel/fpga/fusion_fc_kernel.cpp
+42
-43
src/operators/kernel/fpga/pool_kernel.cpp
src/operators/kernel/fpga/pool_kernel.cpp
+33
-33
src/operators/kernel/fusion_fc_relu_kernal.h
src/operators/kernel/fusion_fc_relu_kernal.h
+0
-37
未找到文件。
src/operators/fusion_elementwise_add_relu_op.cpp
浏览文件 @
7432e34a
...
...
@@ -17,26 +17,29 @@ limitations under the License. */
#include "fusion_elementwise_add_relu_op.h"
namespace
paddle_mobile
{
namespace
operators
{
namespace
operators
{
template
<
typename
Dtype
,
typename
T
>
void
FusionElementwiseAddReluOp
<
Dtype
,
T
>::
InferShape
()
const
{
auto
x_dim
=
this
->
param_
.
InputX
()
->
dims
();
this
->
param_
.
Out
()
->
Resize
(
x_dim
);
}
template
<
typename
Dtype
,
typename
T
>
void
FusionElementwiseAddReluOp
<
Dtype
,
T
>::
InferShape
()
const
{
auto
x_dim
=
this
->
param_
.
InputX
()
->
dims
();
this
->
param_
.
Out
()
->
Resize
(
x_dim
);
}
}
// namespace operators
}
// namespace operators
}
// namespace paddle_mobile
namespace
ops
=
paddle_mobile
::
operators
;
#ifdef PADDLE_MOBILE_CPU
REGISTER_OPERATOR_CPU
(
fusion_elementwise_add_relu
,
ops
::
FusionElementwiseAddReluOp
);
REGISTER_OPERATOR_CPU
(
fusion_elementwise_add_relu
,
ops
::
FusionElementwiseAddReluOp
);
#endif
#ifdef PADDLE_MOBILE_MALI_GPU
REGISTER_OPERATOR_MALI_GPU
(
fusion_elementwise_add_relu
,
ops
::
FusionElementwiseAddReluOp
);
REGISTER_OPERATOR_MALI_GPU
(
fusion_elementwise_add_relu
,
ops
::
FusionElementwiseAddReluOp
);
#endif
#ifdef PADDLE_MOBILE_FPGA
REGISTER_OPERATOR_FPGA
(
fusion_elementwise_add_relu
,
ops
::
FusionElementwiseAddReluOp
);
REGISTER_OPERATOR_FPGA
(
fusion_elementwise_add_relu
,
ops
::
FusionElementwiseAddReluOp
);
#endif
#endif
src/operators/fusion_elementwise_add_relu_op.h
浏览文件 @
7432e34a
...
...
@@ -22,30 +22,31 @@ limitations under the License. */
#include "operators/op_param.h"
namespace
paddle_mobile
{
namespace
operators
{
using
std
::
string
;
template
<
typename
DeviceType
,
typename
T
>
class
FusionElementwiseAddReluOp
:
public
framework
::
OperatorWithKernel
<
DeviceType
,
ElementwiseAddReluParam
,
operators
::
ElementwiseAddReluKernel
<
DeviceType
,
T
>>
{
public:
FusionElementwiseAddReluOp
(
const
string
&
type
,
const
VariableNameMap
&
inputs
,
namespace
operators
{
using
std
::
string
;
template
<
typename
DeviceType
,
typename
T
>
class
FusionElementwiseAddReluOp
:
public
framework
::
OperatorWithKernel
<
DeviceType
,
ElementwiseAddReluParam
,
operators
::
ElementwiseAddReluKernel
<
DeviceType
,
T
>>
{
public:
FusionElementwiseAddReluOp
(
const
string
&
type
,
const
VariableNameMap
&
inputs
,
const
VariableNameMap
&
outputs
,
const
framework
::
AttributeMap
&
attrs
,
std
::
shared_ptr
<
framework
::
Scope
>
scope
)
:
framework
::
OperatorWithKernel
<
DeviceType
,
ElementwiseAddReluParam
,
operators
::
ElementwiseAddReluKernel
<
DeviceType
,
T
>>
(
type
,
inputs
,
outputs
,
attrs
,
scope
)
{}
using
framework
::
OperatorWithKernel
<
DeviceType
,
ElementwiseAddReluParam
,
operators
::
ElementwiseAddReluKernel
<
DeviceType
,
T
>>::
OperatorWithKernel
;
void
InferShape
()
const
override
;
protected:
};
}
// namespace operators
:
framework
::
OperatorWithKernel
<
DeviceType
,
ElementwiseAddReluParam
,
operators
::
ElementwiseAddReluKernel
<
DeviceType
,
T
>>
(
type
,
inputs
,
outputs
,
attrs
,
scope
)
{}
using
framework
::
OperatorWithKernel
<
DeviceType
,
ElementwiseAddReluParam
,
operators
::
ElementwiseAddReluKernel
<
DeviceType
,
T
>>::
OperatorWithKernel
;
void
InferShape
()
const
override
;
protected:
};
}
// namespace operators
}
// namespace paddle_mobile
#ifdef PADDLE_MOBILE_CPU
...
...
src/operators/kernel/elementwise_add_relu_kernel.h
浏览文件 @
7432e34a
...
...
@@ -21,18 +21,18 @@ limitations under the License. */
#include "operators/op_param.h"
namespace
paddle_mobile
{
namespace
operators
{
using
namespace
framework
;
template
<
typename
DeviceType
,
typename
T
>
class
ElementwiseAddReluKernel
:
public
framework
::
OpKernelBase
<
DeviceType
,
ElementwiseAddReluParam
>
{
public:
void
Compute
(
const
ElementwiseAddReluParam
&
param
)
const
;
bool
Init
(
ElementwiseAddReluParam
*
param
);
};
}
// namespace operators
namespace
operators
{
using
namespace
framework
;
template
<
typename
DeviceType
,
typename
T
>
class
ElementwiseAddReluKernel
:
public
framework
::
OpKernelBase
<
DeviceType
,
ElementwiseAddReluParam
>
{
public:
void
Compute
(
const
ElementwiseAddReluParam
&
param
)
const
;
bool
Init
(
ElementwiseAddReluParam
*
param
);
};
}
// namespace operators
}
// namespace paddle_mobile
#endif
src/operators/kernel/fpga/dropout_kernel.cpp
浏览文件 @
7432e34a
...
...
@@ -17,24 +17,24 @@ limitations under the License. */
#include "operators/kernel/dropout_kernel.h"
namespace
paddle_mobile
{
namespace
operators
{
template
<
>
bool
DropoutKernel
<
FPGA
,
float
>::
Init
(
DropoutParam
*
param
)
{
param
->
Out
()
->
ShareDataWith
(
*
param
->
InputX
());
return
true
;
}
template
<
>
void
DropoutKernel
<
FPGA
,
float
>::
Compute
(
const
DropoutParam
&
param
)
const
{
//
auto *input_x = param.InputX();
//
auto *out = param.Out();
//
auto input_x_ptr = input_x->data<float>();
//
auto out_ptr = out->mutable_data<float>();
//
out_ptr = const_cast<float *>(input_x_ptr);
}
}
// namespace operators
namespace
operators
{
template
<
>
bool
DropoutKernel
<
FPGA
,
float
>::
Init
(
DropoutParam
*
param
)
{
param
->
Out
()
->
ShareDataWith
(
*
param
->
InputX
());
return
true
;
}
template
<
>
void
DropoutKernel
<
FPGA
,
float
>::
Compute
(
const
DropoutParam
&
param
)
const
{
//
auto *input_x = param.InputX();
//
auto *out = param.Out();
//
auto input_x_ptr = input_x->data<float>();
//
auto out_ptr = out->mutable_data<float>();
//
out_ptr = const_cast<float *>(input_x_ptr);
}
}
// namespace operators
}
// namespace paddle_mobile
#endif
src/operators/kernel/fpga/elementwise_add_relu_kernel.cpp
浏览文件 @
7432e34a
...
...
@@ -17,46 +17,48 @@ limitations under the License. */
#include "fpga/api/fpga_api.h"
namespace
paddle_mobile
{
namespace
operators
{
template
<
>
bool
ElementwiseAddReluKernel
<
FPGA
,
float
>::
Init
(
ElementwiseAddReluParam
*
param
)
{
bool
relu_enabled
=
true
;
const
Tensor
*
input_x
=
param
->
InputX
();
const
Tensor
*
input_y
=
param
->
InputY
();
Tensor
*
out
=
param
->
Out
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
auto
out_ptr
=
out
->
data
<
float
>
();
fpga
::
EWAddArgs
ewaddArgs
;
ewaddArgs
.
relu_enabled
=
relu_enabled
;
ewaddArgs
.
const0
=
1
;
ewaddArgs
.
const1
=
1
;
ewaddArgs
.
image0
.
address
=
(
void
*
)
input_x_ptr
;
ewaddArgs
.
image0
.
channels
=
input_x
->
dims
()[
1
];
ewaddArgs
.
image0
.
scale_address
=
nullptr
;
//ew has scale attribute??
ewaddArgs
.
image0
.
height
=
input_x
->
dims
()[
2
];
ewaddArgs
.
image0
.
width
=
input_x
->
dims
()[
3
];
ewaddArgs
.
image0
.
pad_height
=
1
;
ewaddArgs
.
image0
.
pad_width
=
1
;
ewaddArgs
.
image1
.
address
=
(
void
*
)
input_y_ptr
;
ewaddArgs
.
image1
.
channels
=
input_y
->
dims
()[
1
];
ewaddArgs
.
image1
.
scale_address
=
nullptr
;
//ew has scale attribute??
ewaddArgs
.
image1
.
height
=
input_y
->
dims
()[
2
];
ewaddArgs
.
image1
.
width
=
input_y
->
dims
()[
3
];
ewaddArgs
.
image1
.
pad_height
=
1
;
ewaddArgs
.
image1
.
pad_width
=
1
;
ewaddArgs
.
output
.
scale_address
=
nullptr
;
ewaddArgs
.
output
.
address
=
(
void
*
)
out_ptr
;
param
->
SetFpgaArgs
(
ewaddArgs
);
return
true
;
}
template
<
>
void
ElementwiseAddReluKernel
<
FPGA
,
float
>::
Compute
(
const
ElementwiseAddReluParam
&
param
)
const
{
fpga
::
ComputeFpgaEWAdd
(
param
.
FpgaArgs
());
}
}
// namespace operators
namespace
operators
{
template
<
>
bool
ElementwiseAddReluKernel
<
FPGA
,
float
>::
Init
(
ElementwiseAddReluParam
*
param
)
{
bool
relu_enabled
=
true
;
const
Tensor
*
input_x
=
param
->
InputX
();
const
Tensor
*
input_y
=
param
->
InputY
();
Tensor
*
out
=
param
->
Out
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
auto
out_ptr
=
out
->
data
<
float
>
();
fpga
::
EWAddArgs
ewaddArgs
;
ewaddArgs
.
relu_enabled
=
relu_enabled
;
ewaddArgs
.
const0
=
1
;
ewaddArgs
.
const1
=
1
;
ewaddArgs
.
image0
.
address
=
(
void
*
)
input_x_ptr
;
ewaddArgs
.
image0
.
channels
=
input_x
->
dims
()[
1
];
ewaddArgs
.
image0
.
scale_address
=
nullptr
;
// ew has scale attribute??
ewaddArgs
.
image0
.
height
=
input_x
->
dims
()[
2
];
ewaddArgs
.
image0
.
width
=
input_x
->
dims
()[
3
];
ewaddArgs
.
image0
.
pad_height
=
1
;
ewaddArgs
.
image0
.
pad_width
=
1
;
ewaddArgs
.
image1
.
address
=
(
void
*
)
input_y_ptr
;
ewaddArgs
.
image1
.
channels
=
input_y
->
dims
()[
1
];
ewaddArgs
.
image1
.
scale_address
=
nullptr
;
// ew has scale attribute??
ewaddArgs
.
image1
.
height
=
input_y
->
dims
()[
2
];
ewaddArgs
.
image1
.
width
=
input_y
->
dims
()[
3
];
ewaddArgs
.
image1
.
pad_height
=
1
;
ewaddArgs
.
image1
.
pad_width
=
1
;
ewaddArgs
.
output
.
scale_address
=
nullptr
;
ewaddArgs
.
output
.
address
=
(
void
*
)
out_ptr
;
param
->
SetFpgaArgs
(
ewaddArgs
);
return
true
;
}
template
<
>
void
ElementwiseAddReluKernel
<
FPGA
,
float
>::
Compute
(
const
ElementwiseAddReluParam
&
param
)
const
{
fpga
::
ComputeFpgaEWAdd
(
param
.
FpgaArgs
());
}
}
// namespace operators
}
// namespace paddle_mobile
#endif
\ No newline at end of file
#endif
src/operators/kernel/fpga/fc_relu_kernel.cpp
浏览文件 @
7432e34a
...
...
@@ -16,51 +16,51 @@ limitations under the License. */
#include "fpga/api/fpga_api.h"
namespace
paddle_mobile
{
namespace
operators
{
namespace
operators
{
template
<
>
bool
FusionFcReluKernel
<
FPGA
,
float
>::
Init
(
FusionFcReluParam
*
param
)
{
bool
relu_enabled
=
true
;
bool
bn_enabled
=
false
;
const
Tensor
*
input_x
=
param
->
InputX
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
const
Tensor
*
input_y
=
param
->
InputY
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
const
Tensor
*
input_z
=
param
->
InputZ
();
auto
input_z_ptr
=
input_z
->
data
<
float
>
();
Tensor
*
out
=
param
->
Out
();
auto
out_ptr
=
out
->
mutable_data
<
float
>
();
template
<
>
bool
FusionFcReluKernel
<
FPGA
,
float
>::
Init
(
FusionFcReluParam
*
param
)
{
bool
relu_enabled
=
true
;
bool
bn_enabled
=
false
;
const
Tensor
*
input_x
=
param
->
InputX
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
const
Tensor
*
input_y
=
param
->
InputY
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
const
Tensor
*
input_z
=
param
->
InputZ
();
auto
input_z_ptr
=
input_z
->
data
<
float
>
();
Tensor
*
out
=
param
->
Out
();
auto
out_ptr
=
out
->
mutable_data
<
float
>
();
fpga
::
ConvArgs
convArgs
;
convArgs
.
relu_enabled
=
relu_enabled
;
convArgs
.
bias_address
=
(
void
*
)
input_z_ptr
;
convArgs
.
filter_address
=
(
void
*
)
input_y_ptr
;
convArgs
.
filter_num
=
out
->
dims
()[
1
];
convArgs
.
group_num
=
1
;
convArgs
.
bn
.
enabled
=
bn_enabled
;
convArgs
.
kernel
.
stride_w
=
1
;
convArgs
.
kernel
.
stride_h
=
1
;
convArgs
.
kernel
.
height
=
input_x
->
dims
()[
2
];
convArgs
.
kernel
.
width
=
input_x
->
dims
()[
3
];
convArgs
.
image
.
address
=
(
void
*
)
input_x_ptr
;
convArgs
.
image
.
channels
=
input_x
->
dims
()[
1
];
convArgs
.
image
.
height
=
input_x
->
dims
()[
2
];
convArgs
.
image
.
width
=
input_x
->
dims
()[
3
];
convArgs
.
image
.
pad_height
=
1
;
convArgs
.
image
.
pad_width
=
1
;
convArgs
.
image
.
scale_address
=
nullptr
;
// fc input has scale attribute??
convArgs
.
output
.
address
=
(
void
*
)
out_ptr
;
convArgs
.
output
.
scale_address
=
nullptr
;
// fc output has scale attribute??
param
->
SetFpgaArgs
(
convArgs
);
fpga
::
ConvArgs
convArgs
;
convArgs
.
relu_enabled
=
relu_enabled
;
convArgs
.
bias_address
=
(
void
*
)
input_z_ptr
;
convArgs
.
filter_address
=
(
void
*
)
input_y_ptr
;
convArgs
.
filter_num
=
out
->
dims
()[
1
];
convArgs
.
group_num
=
1
;
convArgs
.
bn
.
enabled
=
bn_enabled
;
convArgs
.
kernel
.
stride_w
=
1
;
convArgs
.
kernel
.
stride_h
=
1
;
convArgs
.
kernel
.
height
=
input_x
->
dims
()[
2
];
convArgs
.
kernel
.
width
=
input_x
->
dims
()[
3
];
convArgs
.
image
.
address
=
(
void
*
)
input_x_ptr
;
convArgs
.
image
.
channels
=
input_x
->
dims
()[
1
];
convArgs
.
image
.
height
=
input_x
->
dims
()[
2
];
convArgs
.
image
.
width
=
input_x
->
dims
()[
3
];
convArgs
.
image
.
pad_height
=
1
;
convArgs
.
image
.
pad_width
=
1
;
convArgs
.
image
.
scale_address
=
nullptr
;
//fc input has scale attribute??
convArgs
.
output
.
address
=
(
void
*
)
out_ptr
;
convArgs
.
output
.
scale_address
=
nullptr
;
//fc output has scale attribute??
param
->
SetFpgaArgs
(
convArgs
);
return
true
;
}
template
<
>
void
FusionFcReluKernel
<
FPGA
,
float
>::
Compute
(
const
FusionFcReluParam
&
param
)
const
{
fpga
::
ComputeFpgaConv
(
param
.
FpgaArgs
());
};
return
true
;
}
template
<
>
void
FusionFcReluKernel
<
FPGA
,
float
>::
Compute
(
const
FusionFcReluParam
&
param
)
const
{
fpga
::
ComputeFpgaConv
(
param
.
FpgaArgs
());
};
}
// namespace operators
}
// namespace operators
}
// namespace paddle_mobile
#endif
\ No newline at end of file
#endif
src/operators/kernel/fpga/fusion_fc_kernel.cpp
浏览文件 @
7432e34a
...
...
@@ -16,51 +16,50 @@ limitations under the License. */
#include "operators/kernel/fusion_fc_kernel.h"
namespace
paddle_mobile
{
namespace
operators
{
namespace
operators
{
template
<
>
bool
FusionFcKernel
<
FPGA
,
float
>::
Init
(
FusionFcParam
*
param
)
{
bool
relu_enabled
=
false
;
bool
bn_enabled
=
false
;
const
Tensor
*
input_x
=
param
->
InputX
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
const
Tensor
*
input_y
=
param
->
InputY
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
const
Tensor
*
input_z
=
param
->
InputZ
();
auto
input_z_ptr
=
input_z
->
data
<
float
>
();
Tensor
*
out
=
param
->
Out
();
auto
out_ptr
=
out
->
mutable_data
<
float
>
();
template
<
>
bool
FusionFcKernel
<
FPGA
,
float
>::
Init
(
FusionFcParam
*
param
)
{
bool
relu_enabled
=
false
;
bool
bn_enabled
=
false
;
const
Tensor
*
input_x
=
param
->
InputX
();
auto
input_x_ptr
=
input_x
->
data
<
float
>
();
const
Tensor
*
input_y
=
param
->
InputY
();
auto
input_y_ptr
=
input_y
->
data
<
float
>
();
const
Tensor
*
input_z
=
param
->
InputZ
();
auto
input_z_ptr
=
input_z
->
data
<
float
>
();
Tensor
*
out
=
param
->
Out
();
auto
out_ptr
=
out
->
mutable_data
<
float
>
();
fpga
::
ConvArgs
convArgs
;
convArgs
.
relu_enabled
=
relu_enabled
;
convArgs
.
bias_address
=
(
void
*
)
input_z_ptr
;
convArgs
.
filter_address
=
(
void
*
)
input_y_ptr
;
convArgs
.
filter_num
=
out
->
dims
()[
1
];
convArgs
.
group_num
=
1
;
convArgs
.
bn
.
enabled
=
bn_enabled
;
convArgs
.
kernel
.
stride_w
=
1
;
convArgs
.
kernel
.
stride_h
=
1
;
convArgs
.
kernel
.
height
=
input_x
->
dims
()[
2
];
convArgs
.
kernel
.
width
=
input_x
->
dims
()[
3
];
convArgs
.
image
.
address
=
(
void
*
)
input_x_ptr
;
convArgs
.
image
.
channels
=
input_x
->
dims
()[
1
];
convArgs
.
image
.
height
=
input_x
->
dims
()[
2
];
convArgs
.
image
.
width
=
input_x
->
dims
()[
3
];
convArgs
.
image
.
pad_height
=
1
;
convArgs
.
image
.
pad_width
=
1
;
convArgs
.
image
.
scale_address
=
nullptr
;
// fc input has scale attribute??
convArgs
.
output
.
address
=
(
void
*
)
out_ptr
;
convArgs
.
output
.
scale_address
=
nullptr
;
// fc output has scale attribute??
param
->
SetFpgaArgs
(
convArgs
);
return
true
;
}
fpga
::
ConvArgs
convArgs
;
convArgs
.
relu_enabled
=
relu_enabled
;
convArgs
.
bias_address
=
(
void
*
)
input_z_ptr
;
convArgs
.
filter_address
=
(
void
*
)
input_y_ptr
;
convArgs
.
filter_num
=
out
->
dims
()[
1
];
convArgs
.
group_num
=
1
;
convArgs
.
bn
.
enabled
=
bn_enabled
;
convArgs
.
kernel
.
stride_w
=
1
;
convArgs
.
kernel
.
stride_h
=
1
;
convArgs
.
kernel
.
height
=
input_x
->
dims
()[
2
];
convArgs
.
kernel
.
width
=
input_x
->
dims
()[
3
];
convArgs
.
image
.
address
=
(
void
*
)
input_x_ptr
;
convArgs
.
image
.
channels
=
input_x
->
dims
()[
1
];
convArgs
.
image
.
height
=
input_x
->
dims
()[
2
];
convArgs
.
image
.
width
=
input_x
->
dims
()[
3
];
convArgs
.
image
.
pad_height
=
1
;
convArgs
.
image
.
pad_width
=
1
;
convArgs
.
image
.
scale_address
=
nullptr
;
//fc input has scale attribute??
convArgs
.
output
.
address
=
(
void
*
)
out_ptr
;
convArgs
.
output
.
scale_address
=
nullptr
;
//fc output has scale attribute??
param
->
SetFpgaArgs
(
convArgs
);
return
true
;
}
template
<
>
void
FusionFcKernel
<
FPGA
,
float
>::
Compute
(
const
FusionFcParam
&
param
)
const
{
fpga
::
ComputeFpgaConv
(
param
.
FpgaArgs
());
}
}
// namespace operators
template
<
>
void
FusionFcKernel
<
FPGA
,
float
>::
Compute
(
const
FusionFcParam
&
param
)
const
{
fpga
::
ComputeFpgaConv
(
param
.
FpgaArgs
());
}
}
// namespace operators
}
// namespace paddle_mobile
#endif
\ No newline at end of file
#endif
src/operators/kernel/fpga/pool_kernel.cpp
浏览文件 @
7432e34a
...
...
@@ -18,40 +18,40 @@ limitations under the License. */
class
PoolingArgs
;
namespace
paddle_mobile
{
namespace
operators
{
template
<
>
bool
PoolKernel
<
FPGA
,
float
>::
Init
(
PoolParam
*
param
)
{
const
Tensor
*
input
=
param
->
Input
();
auto
input_ptr
=
input
->
data
<
float
>
();
Tensor
*
output
=
param
->
Output
();
auto
output_ptr
=
output
->
data
<
float
>
();
vector
<
int
>
ksize
=
param
->
Ksize
();
vector
<
int
>
strides
=
param
->
Strides
();
vector
<
int
>
paddings
=
param
->
Paddings
();
fpga
::
PoolingArgs
poolArgs
;
poolArgs
.
image
.
address
=
(
void
*
)
input_ptr
;
poolArgs
.
image
.
channels
=
input
->
dims
()[
1
];
poolArgs
.
image
.
height
=
input
->
dims
()[
2
];
poolArgs
.
image
.
width
=
input
->
dims
()[
3
];
poolArgs
.
image
.
pad_height
=
paddings
[
0
];
poolArgs
.
image
.
pad_width
=
paddings
[
1
];
poolArgs
.
output
.
address
=
output_ptr
;
poolArgs
.
kernel
.
height
=
ksize
[
0
];
poolArgs
.
kernel
.
width
=
ksize
[
1
];
poolArgs
.
kernel
.
stride_h
=
strides
[
0
];
poolArgs
.
kernel
.
stride_w
=
strides
[
1
];
param
->
SetFpgaArgs
(
poolArgs
);
return
true
;
}
template
<
>
void
PoolKernel
<
FPGA
,
float
>::
Compute
(
const
PoolParam
&
param
)
const
{
namespace
operators
{
template
<
>
bool
PoolKernel
<
FPGA
,
float
>::
Init
(
PoolParam
*
param
)
{
const
Tensor
*
input
=
param
->
Input
();
auto
input_ptr
=
input
->
data
<
float
>
();
Tensor
*
output
=
param
->
Output
();
auto
output_ptr
=
output
->
data
<
float
>
();
vector
<
int
>
ksize
=
param
->
Ksize
();
vector
<
int
>
strides
=
param
->
Strides
();
vector
<
int
>
paddings
=
param
->
Paddings
();
fpga
::
PoolingArgs
poolArgs
;
poolArgs
.
image
.
address
=
(
void
*
)
input_ptr
;
poolArgs
.
image
.
channels
=
input
->
dims
()[
1
];
poolArgs
.
image
.
height
=
input
->
dims
()[
2
];
poolArgs
.
image
.
width
=
input
->
dims
()[
3
];
poolArgs
.
image
.
pad_height
=
paddings
[
0
];
poolArgs
.
image
.
pad_width
=
paddings
[
1
];
poolArgs
.
output
.
address
=
output_ptr
;
poolArgs
.
kernel
.
height
=
ksize
[
0
];
poolArgs
.
kernel
.
width
=
ksize
[
1
];
poolArgs
.
kernel
.
stride_h
=
strides
[
0
];
poolArgs
.
kernel
.
stride_w
=
strides
[
1
];
param
->
SetFpgaArgs
(
poolArgs
);
return
true
;
}
template
<
>
void
PoolKernel
<
FPGA
,
float
>::
Compute
(
const
PoolParam
&
param
)
const
{
#ifdef PADDLE_MOBILE_FPGA
fpga
::
ComputeFpgaPool
(
param
.
FpgaArgs
());
fpga
::
ComputeFpgaPool
(
param
.
FpgaArgs
());
#endif
}
}
// namespace operators
}
}
// namespace operators
}
// namespace paddle_mobile
#endif
\ No newline at end of file
#endif
src/operators/kernel/fusion_fc_relu_kernal.h
已删除
100644 → 0
浏览文件 @
30ca60d7
/* Copyright (c) 2018 PaddlePaddle Authors. All Rights Reserved.
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License. */
#ifdef FUSION_FC_RELU_OP
#pragma once
#include "framework/operator.h"
#include "operators/math/math_function.h"
#include "operators/op_param.h"
namespace
paddle_mobile
{
namespace
operators
{
template
<
typename
DeviceType
,
typename
T
>
class
FusionFcReluKernel
:
public
framework
::
OpKernelBase
<
DeviceType
,
FusionFcReluParam
>
{
public:
void
Compute
(
const
FusionFcReluParam
&
param
)
const
;
bool
Init
(
FusionFcReluParam
*
param
);
};
}
// namespace operators
}
// namespace paddle_mobile
#endif
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