(bugfix): change kernel size from -1 to valid value while global pooling is true

(ref): add sigmoid and elementwise_mul x86 kernel interface

lite/kernels/mlu/bridges/pool_op.cc

@@ -72,6 +72,13 @@ int PoolConverter(void* ctx, OpLite* op, KernelBase* kernel) {
   if (op_info->HasAttr("adaptive")) {
     adaptive = op_info->GetAttr<bool>("adaptive");
   }
+  auto input_dims = x->dims();
+  if (global_pooling) {
+    ksize.resize(static_cast<size_t>(input_dims.size()) - 2);
+    for (size_t i = 0; i < ksize.size(); ++i) {
+      ksize[i] = static_cast<int>(input_dims[i + 2]);
+    }
+  }
   lite::operators::UpdatePadding(&paddings,
                                  global_pooling,
                                  adaptive,

lite/kernels/x86/activation_compute.cc

@@ -78,3 +78,13 @@ REGISTER_LITE_KERNEL(softsign,
     .BindInput("X", {LiteType::GetTensorTy(TARGET(kX86))})
     .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kX86))})
     .Finalize();
+
+REGISTER_LITE_KERNEL(sigmoid,
+                     kX86,
+                     kFloat,
+                     kNCHW,
+                     paddle::lite::kernels::x86::SoftsignCompute<float>,
+                     def)
+    .BindInput("X", {LiteType::GetTensorTy(TARGET(kX86))})
+    .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kX86))})
+    .Finalize();

lite/kernels/x86/elementwise_compute.cc

@@ -35,3 +35,14 @@ REGISTER_LITE_KERNEL(elementwise_add,
     .BindInput("Y", {LiteType::GetTensorTy(TARGET(kX86))})
     .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kX86))})
     .Finalize();
+
+REGISTER_LITE_KERNEL(elementwise_mul,
+                     kX86,
+                     kFloat,
+                     kNCHW,
+                     paddle::lite::kernels::x86::ElementwiseAddCompute<float>,
+                     def)
+    .BindInput("X", {LiteType::GetTensorTy(TARGET(kX86))})
+    .BindInput("Y", {LiteType::GetTensorTy(TARGET(kX86))})
+    .BindOutput("Out", {LiteType::GetTensorTy(TARGET(kX86))})
+    .Finalize();