- 27 3月, 2013 2 次提交
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由 Ajay Kumar 提交于
Add required compatible information for FIMD. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Ajay Kumar 提交于
Add required compatible information for FIMD. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 26 3月, 2013 1 次提交
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由 Allen Martin 提交于
Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: NAllen Martin <amartin@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com>
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- 19 3月, 2013 2 次提交
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由 Simon Glass 提交于
Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 15 3月, 2013 3 次提交
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由 Tom Warren 提交于
Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: NTom Warren <twarren@nvidia.com> Reviewed-by: NStephen Warren <swarren@nvidia.com>
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由 Tom Warren 提交于
tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: NTom Warren <twarren@nvidia.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Reviewed-by: NStephen Warren <swarren@nvidia.com>
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由 Tom Warren 提交于
T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: NTom Warren <twarren@nvidia.com> Acked-by: NLaxman Dewangan <ldewangan@nvidia.com>
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- 12 3月, 2013 1 次提交
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由 Akshay Saraswat 提交于
Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 08 3月, 2013 1 次提交
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由 Rajeshwari Shinde 提交于
Add required compatible information for MAX98095 codec Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 12 2月, 2013 2 次提交
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由 Allen Martin 提交于
Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: NAllen Martin <amartin@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Allen Martin 提交于
Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: NAllen Martin <amartin@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 10 1月, 2013 1 次提交
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由 Rajeshwari Shinde 提交于
Add required compatible information for PMIC Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 08 1月, 2013 4 次提交
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由 Rajeshwari Shinde 提交于
Add required compatible information for USB Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Rajeshwari Shinde 提交于
Add required compatible information for SPI driver. Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Rajeshwari Shinde 提交于
Add required compatible information for sound driver. Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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由 Rajeshwari Shinde 提交于
Add required compatible information for I2C driver. Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Acked-by: NHeiko Schocher <hs@denx.de> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 26 12月, 2012 1 次提交
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由 Hatim RV 提交于
Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: NHatim Ali <hatim.rv@samsung.com> Acked-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
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- 19 11月, 2012 2 次提交
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由 Wei Ni 提交于
Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: NMayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: NSimon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Simon Glass 提交于
The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 13 11月, 2012 8 次提交
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由 Sean Paul 提交于
Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: NSean Paul <seanpaul@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Che-Liang Chiou 提交于
It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: NChe-Liang Chiou <clchiou@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Gabe Black 提交于
Signed-off-by: NVincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Gerald Van Baren 提交于
The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Abhilash Kesavan 提交于
Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Abhilash Kesavan 提交于
Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 22 9月, 2012 1 次提交
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由 Simon Glass 提交于
This makes it easier to include this header from other headers. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NMike Frysinger <vapier@gentoo.org>
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- 08 9月, 2012 1 次提交
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由 Jim Lin 提交于
A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: NJim Lin <jilin@nvidia.com> Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 01 9月, 2012 1 次提交
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由 Allen Martin 提交于
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: NAllen Martin <amartin@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 15 5月, 2012 5 次提交
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由 Rakesh Iyer 提交于
Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Anton Staff 提交于
Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Jimmy Zhang 提交于
Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Simon Glass 提交于
We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Simon Glass 提交于
fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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- 29 3月, 2012 4 次提交
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由 Yen Lin 提交于
Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NHeiko Schocher <hs@denx.de> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Simon Glass 提交于
Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Simon Glass 提交于
CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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由 Simon Glass 提交于
This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
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