The Sequoia NAND booting target now uses the recently extracted
cpu/ppc4xx/denali_data_eye.c file too.
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NLarry Johnson <lrj@acm.org>

Note: this patch changes the configuration of some GPIO registers:

   Register      Old Value   New Value
---------------  ----------  ----------
DCR GPIO0_TCR    0x0000000F  0x0000F0CF
DCR GPIO0_TSRH   0x55005000  0x00000000
DCR GPIO1_TCR    0xC2000000  0xE2000000
DCR GPIO1_TSRL   0x0C000000  0x00200000
DCR GPIO1_ISR2L  0x00050000  0x00110000
Signed-off-by: NLarry Johnson <lrj@acm.org>

This patch makes two additions to GPIO support:

First, it adds function gpio_read_in_bit() to read the a bit from the
GPIO Input Register (GPIOx_IR) in the same way that function
gpio_read_out_bit() reads a bit from the GPIO Output Register
(GPIOx_OR).

Second, it modifies function gpio_set_chip_configuration() to provide
an additional option for configuring the GPIO from the
"CFG_4xx_GPIO_TABLE".

According to the 440EPx User's Manual, when an alternate output is used,
the three-state control is configured in one of two ways, depending on
the particular output.  The first option is to select the corresponding
alternate three-state control in the GPIOx_TRSH/L registers.  The second
option is to select the GPIO Three-State Control Register (GPIOx_TCR) in
the GPIOx_TRSH/L registers, and set the corresponding bit in the
GPIOx_TCR register to enable the output.  For example, the Manual
specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use
the alternate three-state control (first option), and specifies
configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output
enabled in the GPIOx_TCR register (second option).

Currently, gpio_set_chip_configuration() configures all alternate signal
outputs to use the first option.  This patch allow the second option to
be selected by setting the "out_val" element in the table entry to
"GPIO_OUT_1".  The first option is used when the "out_val" element is
set to "GPIO_OUT_0".  Because "out_val" is not currently used when an
alternate signal is selected, and because all current GPIO tables set
"out_val" to "GPIO_OUT_0" for all alternate signals, this patch should
not change any existing configurations.
Signed-off-by: NLarry Johnson <lrj@acm.org>

These definitions are now in "include/ppc440.h".
Signed-off-by: NLarry Johnson <lrj@acm.org>

This patch also modifies the functionality of the code so that the data-eye
search is now done with with the cache disabled.
Signed-off-by: NLarry Johnson <lrj@acm.org>

These definitions are now in "include/ppc440.h".
Signed-off-by: NLarry Johnson <lrj@acm.org>

Signed-off-by: NLarry Johnson <lrj@acm.org>

Include config.h earlier in the set of #includes
so as to avoid a incidental and duplicate definition
of CFG_CACHELINE_SIZE.

Signed-off-by: Jon Loeliger

Doing so prevents it from being individually set
and useful in other files.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

Assumes the presence of the aliases node in the DTS to
locate the ethernet, pci and serial nodes for fixups.

Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: NJon Loeliger <jdl@freescale.com>

This bug was detected on the LWMON5 target which has 2 Intel 16bit wide
flash chips connected to a 32bit wide port.
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

The bash builtin versions of the "test" (resp. "[") command allow
using "==" for string comparisons, but POSIX compatible implemen-
tations (like /usr/bin/test) insist on using "=" only. On such systems
you will see:

	$ /usr/bin/test a == a && echo OK
	/usr/bin/test: ==: binary operator expected

This patch fixes Makefiles and scripts to use POSIX style.
Signed-off-by: NWolfgang Denk <wd@denx.de>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Conflicts:

	cpu/ppc4xx/fdt.c
	include/configs/kilauea.h
	include/configs/sequoia.h
Signed-off-by: NStefan Roese <sr@denx.de>

Signed-off-by: NStefan Roese <sr@denx.de>

This patch brings the PMC440 board configuration file.
Finally it enables the PMC440 board support.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

This patch adds some BSP commands and FPGA booting support
for esd's PMC440 boards.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

This patch adds the first files for the new esd PMC440 boards.
The next two patches will complete the PMC440 board support.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

- add EEPROM write protection for esd PLU405 boards.
- initialize NAND GPIOs
- use correct io accessors
- cleanup
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

This patch fixes esd's LCD dectection code to work correctly with
newer gcc versions.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

- add EEPROM write protection
- initialize NAND GPIOs
- use correct io accessors
- slow down I2C clock to 100kHz
- enable ext. I2C bus
- cleanup
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

In an attmemt to clean up the 4xx start.S file, I removed the enabling
of the internal 405EP PCI arbiter. This is needed for multiple other
405EP platforms, like most of the esd 405EP. Now the internal PCI
arbiter is enabled again per default as it has been before.
Signed-off-by: NStefan Roese <sr@denx.de>
Acked-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

Signed-off-by: NStefan Roese <sr@denx.de>
Acked-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

Use correct link to nand_ecc now located in drivers/mtd/nand/ for the
platforms mentioned above.
Signed-off-by: NStefan Roese <sr@denx.de>

This board never left prototyping state and it
became a millstone round my neck. So remove it.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>

These patches add support for the PPC440EPx-based "Korat" board to
U-Boot.  They are based primarily on support for the Sequoia board.
Signed-off-by: NLarry Johnson <lrj@acm.org>

This patch supplies the configuration file for the Korat PPC440EPx-
processor board.
Signed-off-by: NLarry Johnson <lrj@acm.org>

Signed-off-by: NLarry Johnson <lrj@acm.org>

This patch adds SPD DDR2 support for the 440EPx ("Denali") SDRAM
controller.  It should also work on the 440GRx.  It is based on the DDR2
SPD code for the 440EP/440EPx, but makes no provision for DDR1 support.

This code has been tested on prototype Korat boards with three Kingston
DIMMS: 512 MiB ECC (one rank), 512 MiB non-ECC (one rank) and 1 GiB ECC
(two ranks).  The Korat board has a single DIMM socket, but support has
been provided (though not tested) for boards with two DIMM sockets.
Signed-off-by: NLarry Johnson <lrj@acm.org>

This patch creates a non-board-specific file for performing the SDRAM
data-eye search.  It also adds ECC error checking to the test of valid
data on readback when ECC is enabled.
Signed-off-by: NLarry Johnson <lrj@acm.org>

This patch adds the Denali SDRAM controller definitions to "ppc440.h".
It also fixes two typos in the definitions, so the board-specific
"sdram.h" files containing these definitions are also fixed to avoid
compiler warnings.
Signed-off-by: NLarry Johnson <lrj@acm.org>

This patch adds a new switch: "CONFIG_PHY_DYNAMIC_ANEG".  When this symbol
is defined, the PHY will advertise it's capabilities for autonegotiation
based on the capabilities shown in the PHY's status registers, including
1000BASE-X.  When "CONFIG_PHY_DYNAMIC_ANEG" is not defined, the PHY will
advertise hard-coded capabilities, as before.
Signed-off-by: NLarry Johnson <lrj@acm.org>

This driver is based on the driver for the LM75.
Signed-off-by: NLarry Johnson <lrj@acm.org>

This driver is based on the driver for the M41T11.  In the intended
application, the RTC will be powered by a large capacitor, rather than a
battery.  The driver therefore checks to see whether the RTC has lost
power.  The chip's OUT bit is normally reset from its power-up state.  If
the OUT bit is read as set, or if the date and time are not valid, then the
RTC is assumed to have lost power, and its date and time are reset to
1900-01-01 00:00:00.

Support for adjusting the speed of the clock to improve accuracy is
provided through an environment variable.
Signed-off-by: NLarry Johnson <lrj@acm.org>