- 29 9月, 2018 8 次提交
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由 Simon Glass 提交于
At present we require the caller to manually update the device tree using individual calls to libfdt functions. This is not ideal. It would be better if we could make changes using the Python structure and then call a Sync() function to write them back. Add this feature to the Fdt class. Update binman and the tests to match. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Sometimes it is useful to build only a subset of the images provided by the binman configuration. Add a -i option for this. It can be given multiple times to build several images. If the option is not given, all images are built. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
At present if there are two vblock entries an image their contents are written to the same file in the output directory. This prevents checking the contents of each separately. Fix this by adding part of the entry path to the filename, and add some missing comments. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Sometimes we want to include TPL for x86 platforms, such as when we want to select between different SPL images (e.g. for Chrome OS verified boot). Add support for this. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
When the value of a text entry is not provided an execption is generated talking about a None type. This is confusing. Add a more explanatory error and a test for this case. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The check for this should be for None, not 0. Fix it and add a test. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This information should be in the entry it relates to, not in the main README. Move it. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Pull this support from these upstream commits: bfbfab0 pylibfdt: Add a means to add and delete notes 9005f41 pylibfdt: Allow delprop() to return errors Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 27 9月, 2018 3 次提交
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git://git.denx.de/u-boot-microblaze由 Tom Rini 提交于
Xilinx changes for v2018.11 - Handle BOARD_LATE_INIT via Kconfig SPL: - Enable GZIP for all partitions types(not only for kernel) ZynqMP: - Rearrange pmufw version handling - Support newer PMUFW with improved fpga load sequence Zynq: - Cleanup config file - Simplify zybo config by enabling option via Kconfig net: - Fix gems max-speed property reading - Enable support for fixed-link phys
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由 Michal Simek 提交于
Based on dt-specs fixed-link doesn't require phy-handle to be used. Fix driver to only read phy related setting when phy-handle is found. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
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git://github.com/agraf/u-boot由 Tom Rini 提交于
Patch queue for efi - 2018-09-26 A lot of goodness in this release. We're *very* close to running the UEFI Shell and SCT natively. The only missing piece are HII protocols. - FAT write support (needed for SCT) - improved FAT directory support (needed for SCT) - RTC support with QEMU -M virt - Sandbox support (run UEFI binaries in Linux - yay) - Proper UTF-16 support - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell) - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell) - Fix window size determination - Fix Tegra by explicitly unmapping RAM - Clean up handle entanglement - Lots of generic code cleanup [trini: Fixup merge conflict in include/configs/qemu-arm.h] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 26 9月, 2018 29 次提交
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由 Alexander Graf 提交于
When running sandbox with the new pointer sanitization we just recently introduced, we're running into a case with FIT images where we end up interpreting pointers as addresses. What happened is that most callers of set_working_fdt_addr() simply convert pointers into addresses without taking into account that they might be 2 separate address spaces. Fix the callers up to map their pointers into addresses. This makes sandbox tests pass for me again. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Luis Araneda 提交于
Only add CONFIG_DISPLAY to defconfig because CONFIG_I2C_EDID is automatically selected by CONFIG_DISPLAY Signed-off-by: NLuis Araneda <luaraneda@gmail.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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max-speed property is part of phynode and it has to be read using ofnode_read_u32_default(). This fixes the issue of incorrect max-speed read from DT. Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
There is no reason to limit gzip usage only for OS_BOOT and kernel image type. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Tested-by: NYork Sun <york.sun@nxp.com>
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This patch modifies PL bitstream loading sequence as per latest Xilfpga which supports all variants of bitstream images generated from vivado and from bootgen. With this new change in Xilfpga, uboot doesn't need to validate and swap bitstream as it will be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting PMUFW version before skipping the validation and swap sequence as there can be old PMUFW which doesn't supports this feature. In this case, driver uses old way of PL bitstream loading sequence. Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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Modify the zynqmp_pmufw_version() routine to return PMUFW version so that it can be reused wherever required. Get PMUFW version from PMU only once at bootup and later just return stored value. Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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This patch moves the PM version related macros to .h file so that they can be reused in other files. Signed-off-by: NSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Moving options to Kconfig some comments are useless now. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Disable BOARD_LATE_INIT via Kconfig. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Bin Meng 提交于
Now that we already disable the "strict-aliasing" globally, remove the duplicates in the nds32/riscv/x86 arch-specific Makefiles. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NRick Chen <rick@andestech.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
The -fstrict-aliasing option is implicitly enabled at levels -O2, -O3, -Os by GCC. This option allows the compiler to assume the strictest aliasing rules applicable to the language being compiled. For example, the practice of reading from a different union member than the one most recently written to (called "type-punning") is common. In this case, "type-punning" only works if the memory is accessed through the union type, but might not work by taking the address, casting the resulting pointer and dereferencing the result, which is an undefined behavior per the "strict aliasing rules". GCC's -Wstrict-aliasing (included in -Wall) option does not catch all cases, but does attempt to catch the more common pitfalls. So there are cases that GCC does not report but the codes are violating the "strict aliasing rules". Given lots of codes that may be written to rely on "type-punning", and Linux kernel disables it by -fno-strict-aliasing globally, since U-Boot currently does this on nds32/riscv/x86 builds only, extend this for all architecture builds. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Lokesh Vutla 提交于
AM654 uses a UART controller that is compatible (partially) with existing OMAP UART, Introduce a compatible for adding support for this controller. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
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由 Tuomas Tynkkynen 提交于
This option has never been used for anything. Drop it. Signed-off-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Tuomas Tynkkynen 提交于
These options are not used or necessary when device model is being used for SCSI. Just drop them. Signed-off-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Tuomas Tynkkynen 提交于
When using device model this sort of hardcoded limits aren't used or necessary. Signed-off-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Tuomas Tynkkynen 提交于
The loop in ahci_start_ports() is looping over the maximum number of SCSI devices in the system, which can be larger than the amount of ports a particular AHCI controller has. The extra looping isn't directly harmful because the link_port_map bitmap won't have the bit set for a nonexistent port, but it is wasteful. Replace the loop limit with the port count of the AHCI controller instead. Signed-off-by: NTuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Chris Packham 提交于
Make use of asm-generic/atomic.h. Signed-off-by: NChris Packham <judge.packham@gmail.com> Acked-by: NMax Filippov <jcmvbkbc@gmail.com>
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由 Chris Packham 提交于
Make use of asm-generic/atomic.h. Signed-off-by: NChris Packham <judge.packham@gmail.com>
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由 Chris Packham 提交于
Make use of asm-generic/atomic.h retaining the smp_mb_... definitions. Signed-off-by: NChris Packham <judge.packham@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Chris Packham 提交于
The arm, xtensa and mips version of atomic.h were already very similar (the mips one was a copy of xtensa). Combine these implementations together to produce a generic atomic.h that can be included by these architectures (and any others that need it in future). Signed-off-by: NChris Packham <judge.packham@gmail.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Heinrich Schuchardt 提交于
The 'conitrace' command prints the codes received from the console input as hexadecimal numbers. This developer utility is useful for testing the handling of special keys by keyboard drivers. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Adam Ford 提交于
The MMC card detect pin is connected to gpio127 on omap3_logic. When setting up the pbias register for MMC, let's also enable gpio_127 for the card detect. As part of the package deal, gpio_126 and gpio_129 are also enabled. Signed-off-by: NAdam Ford <aford173@gmail.com>
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由 Tom Rini 提交于
In the section about Device Trees add a paragraph at the end that clarifies how we decide of a tree is valid or not. We say that all bindings must either be in the specification (link provided) or in our device-tree-bindings directory. We say that most of these come from the Linux Kernel and as such some design decisions are made for us already, but that in most cases we wish to retain compatibility. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: NTom Rini <trini@konsulko.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Quentin Schulz 提交于
The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike the current 0x70 which enables the clock of UART2, SSP1 and SSP2. Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com> Acked-by: NStefan Roese <sr@denx.de>
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由 Quentin Schulz 提交于
SPI controllers SSP1, 2 and 3 require to enable their respective clocks. Let's enable them only when the SPI controller driver is built. Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
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由 Quentin Schulz 提交于
This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO. A few parts were borrowed from the Linux kernel driver. Cc: Armando Visconti <armando.visconti@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: NQuentin Schulz <quentin.schulz@bootlin.com>
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由 Sekhar Nori 提交于
Enable CONFIG_OF_BOARD_SETUP as it is needed for Beaglebone black to overwrite the Ethernet phy address present in DT in case the phy latches on to a different address. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Sekhar Nori 提交于
On beaglebone black, it can so happen that PHY address is not latched correctly on reset and board boots with PHY responding to a different address than that programmed in device-tree. For example, see this report: https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J Workaround this by fixing up device-tree passed to kernel by using the PHY address detected in hardware. Beaglebone itself uses only one ethernet port and its DT currently uses phy_id (obsoleted). But the function has been written to handle multiple ports and phy_id as well as phy-handle to make the function more generically useful. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Sekhar Nori 提交于
On some boards using TI CPSW, it may be possible that PHY address was not latched correctly, and the actual address that the phy responds on is different from that set in device-tree. For example, see this problem report on beaglebone black: https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J Add support to check for this condition and use the detected phy address when its safe to do so. Also, add a public API that exposes the phy address of a given slave. This can be used to update device-tree that is passed to Linux kernel. Signed-off-by: NSekhar Nori <nsekhar@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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