1. 07 10月, 2016 2 次提交
  2. 02 10月, 2016 15 次提交
  3. 29 9月, 2016 1 次提交
  4. 28 9月, 2016 15 次提交
    • S
      drivers: usb: xhci-fsl: Implement Erratum A-010151 for FSL USB3 controller · 4c043712
      Sriram Dash 提交于
      Currently the controller by default enables the Receive Detect feature in P3
      mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
      detection in P3 mode.
      Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
      Detect feature is required.
      Signed-off-by: NSriram Dash <sriram.dash@nxp.com>
      Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com>
      4c043712
    • S
      usb: fsl: Rename fdt_fixup_dr_usb · a5c289b9
      Sriram Dash 提交于
      The function fdt_fixup_dr_usb is specific to fsl/nxp. So,
      make the function name explicit and rename fdt_fixup_dr_usb
      into fsl_fdt_fixup_dr_usb.
      Signed-off-by: NSriram Dash <sriram.dash@nxp.com>
      a5c289b9
    • M
      apalis_t30: colibri_imx7: colibri_t30: fix ethernet functionality · f7c81e28
      Marcel Ziswiler 提交于
      Since commit aa7a6487
      ("net: Stop including NFS overhead in defragment max") the following
      has been reproducibly observed while trying to transfer data over TFTP:
      
      Load address: 0x80408000
      Loading: EHCI timed out on TD - token=0x8008d80
      T EHCI timed out on TD - token=0x88008d80
      Rx: failed to receive: -5
      
      This patch fixes this by lowering our TFTP block size to be within the
      standard maximal de-fragmentation aka IP packet size again.
      Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
      f7c81e28
    • B
      dra7x: configs: enable SPL-DFU support · cdb1808a
      B, Ravi 提交于
      This patch enables the SPL-DFU support for
      dra7x platform.
      Signed-off-by: NRavi Babu <ravibabu@ti.com>
      Reviewed-by: NTom Rini <trini@konsulko.com>
      cdb1808a
    • B
      spl: dfu: adding dfu support functions for SPL-DFU · 52f2acc5
      B, Ravi 提交于
      Adding support functions to run dfu spl commands.
      Signed-off-by: NRavi Babu <ravibabu@ti.com>
      Reviewed-by: NTom Rini <trini@konsulko.com>
      52f2acc5
    • B
      common: dfu: saperate the dfu common functionality · 05341a87
      B, Ravi 提交于
      The cmd_dfu functionality is been used by both SPL and
      u-boot, saperating the core dfu functionality moving
      it to common/dfu.c.
      Signed-off-by: NRavi Babu <ravibabu@ti.com>
      Reviewed-by: NTom Rini <trini@konsulko.com>
      05341a87
    • S
      drivers: usb: xhci-fsl: Change burst beat and outstanding pipelined transfers requests · e915716a
      Sriram Dash 提交于
      This is required for better performance, and performs below tuning:
      1. Enable burst length set, and define it as 4/8/16.
      2. Set burst request limit to 16 requests.
      Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com>
      Signed-off-by: NSriram Dash <sriram.dash@nxp.com>
      e915716a
    • M
      colibri_t30: fix usb ethernet functionality · 7f753cbe
      Marcel Ziswiler 提交于
      Since commit aa7a6487
      ("net: Stop including NFS overhead in defragment max") the following
      has been reproducibly observed while trying to transfer data over TFTP:
      
      Load address: 0x80408000
      Loading: EHCI timed out on TD - token=0x8008d80
      T EHCI timed out on TD - token=0x88008d80
      Rx: failed to receive: -5
      
      This patch fixes this by upping our maximal de-fragmentation aka IP
      packet size again.
      Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
      7f753cbe
    • T
      CPCI4052: Remove CONFIG_AUTO_COMPLETE and custom baud rate table · 657d70cd
      Tom Rini 提交于
      This board is getting close to or exceeding the size limit again, remove
      CONFIG_AUTO_COMPLETE to save space and while in here switch to the
      default and slightly less complete default baudrate table.
      
      Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
      Signed-off-by: NTom Rini <trini@konsulko.com>
      Signed-off-by: NStefan Roese <sr@denx.de>
      657d70cd
    • S
      ARM: tegra: pull Tegra210 SoC DT from Linux v4.7 · ee562dc3
      Stephen Warren 提交于
      The primary benefit of this change is that it adds all missing clocks and
      resets properties to peripherals. This will allow peripheral drivers to
      migrate to the standard clock and reset APIs in the future.
      
      Main changes:
      * Brought in the correct Tegra210 CAR binding; the old file in U-Boot
        appears to be a renamed version of the Tegra124 bindings rather than
        the real Tegra210 version.
      * Conversion of SPI and UART nodes to standard DMA bindings. U-Boot
        doesn't use DMA so isn't affected.
      * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
        information required by U-Boot, so U-Boot is not affected.
      * Conversion of many magic numbers to named defines.
      * Addition of many nodes not used by U-Boot, including separation of the
        Tegra LIC (Legacy IRQ controller) and GIC.
      * Node sort order fixes.
      
      Remaining deltas relative to the Linux DT:
      * U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet.
      * The GPIO node compatible value in the kernel explicitly includes
        Tegra124 values whereas U-Boot does not. I'll send a kernel patch to
        correct this.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NTom Warren <twarren@nvidia.com>
      ee562dc3
    • S
      ARM: tegra: pull Tegra124 SoC DT from Linux v4.7 · 3b8c1b3b
      Stephen Warren 提交于
      The primary benefit of this change is that it adds all missing clocks and
      resets properties to peripherals. This will allow peripheral drivers to
      migrate to the standard clock and reset APIs in the future.
      
      Main changes:
      * USB phy_type property is aligned with the kernel, so board files are
        updated so the final DT content doesn't change. I'm not convinved that
        Nyan uses HSIC phy_type. However, I'd rather this change be a no-op,
        and any DT bug-fixes be separate.
      * Sync misc changes from the kernel: missing DT content, minor compatible
        value fixes, typos.
      
      Remaining deltas relative to the Linux DT:
      * U-Boot uses #address-cells/#size-cells of 1 whereas the kernel uses 2.
        I believe U-Boot's DT parsing currently assumes that these values match
        the physical address size, so I didn't synchronize this part of the DT.
      * U-Boot uses the original XUSB PHY DT binding, wherease the kernel DT
        has moved to a newer version. Thus, XUSB client nodes include properties
        names phys and phy-names that do not appear in the kernel, and don't
        include pad definitions in the padctl node.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NTom Warren <twarren@nvidia.com>
      3b8c1b3b
    • S
      ARM: tegra: pull Tegra114 SoC DT from Linux v4.7 · 5c31e7ab
      Stephen Warren 提交于
      The primary benefit of this change is that it adds all missing clocks and
      resets properties to peripherals. This will allow peripheral drivers to
      migrate to the standard clock and reset APIs in the future.
      
      Main changes:
      * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use
        DMA so isn't affected.
      * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
        information required by U-Boot, so U-Boot is not affected.
      * Boards need to define the clk32k_in clock that feeds the Tegra PMC.
      * Addition of tegra114-mc.h since tegra114.dtsi now includes it.
      * Conversion of many magic numbers to named defines.
      * Addition of many nodes not used by U-Boot.
      * Node sort order fixes.
      
      Remaining deltas relative to the Linux DT:
      * USB node compatible values in U-Boot explicitly list Tegra114 values
        whereas the kernel does not. I'll send a kernel patch to correct this.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NTom Warren <twarren@nvidia.com>
      5c31e7ab
    • S
      ARM: tegra: pull Tegra30 SoC DT from Linux v4.7 · ce2f2d2a
      Stephen Warren 提交于
      The primary benefit of this change is that it adds all missing clocks and
      resets properties to peripherals. This will allow peripheral drivers to
      migrate to the standard clock and reset APIs in the future.
      
      Main changes:
      * Modification of PCIe memory region addresses. The HW memory layout is
        programmable, so this should work fine, and Beaver PCIe was tested
        without issue.
      * Removal of pcie_xclk from the PCIe node and clock binding header. This
        clock doesn't exist and isn't used; only a reset with this ID exists.
      * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use
        DMA so isn't affected.
      * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
        information required by U-Boot, so U-Boot is not affected.
      * Changed the phy_type value for the second USB port. This required board
        DTs to be updated to keep the same configuration.
      * Boards need to define the clk32k_in clock that feeds the Tegra PMC.
      * Addition of tegra30-mc.h since tegra30.dtsi now includes it.
      * Conversion of many magic numbers to named defines.
      * Addition of many nodes not used by U-Boot.
      * Node sort order fixes.
      
      Remaining deltas relative to the Linux DT:
      * None.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NTom Warren <twarren@nvidia.com>
      ce2f2d2a
    • S
      ARM: tegra: pull Tegra20 SoC DT from Linux v4.7 · 50a303bd
      Stephen Warren 提交于
      This brings in a few minor fixes since the last sync. The largest change
      is the removal of the definition for TEGRA20_CLK_PCIE_XCLK. This clock
      doesn't actually exist.
      
      Remaining deltas:
      * Addition of u-boot,dm-pre-reloc property to a couple of nodes.
      * Addition of the NAND controller, which Linux doesn't yet support.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NTom Warren <twarren@nvidia.com>
      50a303bd
    • B
      ARM: tegra: increase console buffer size and sys args num · 64a4fe74
      Bryan Wu 提交于
      The Linux-for-Tegra kernel uses a very long command line.
      
      The default value of CONFIG_SYS_CBSIZE is too small to printf out the
      long command line and causes a message like:
        bootarg overflow 602+0+0+1 > 512
      on the console, and the board refuses to boot.
      
      The default value of CONFIG_SYS_MAXARGS is too small to add a long
      long command line, and the kernel won't boot without the complete
      bootargs.
      
      Increasing these two config options solves this problem.
      Signed-off-by: NBryan Wu <pengw@nvidia.com>
      Signed-off-by: NPeter Chubb <Peter.Chubb@data61.csiro.au>
      Acked-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NTom Warren <twarren@nvidia.com>
      64a4fe74
  5. 27 9月, 2016 6 次提交
    • S
      arm64: mvebu: Add Armada 7K db-88f7040 development board support · 6f8c2d49
      Stefan Roese 提交于
      This patch adds basic support for the Marvell Armada 7K DB-88F7040
      development board. Supported are the following interfaces:
      - UART
      - SPI (incl. SPI NOR)
      - I2C
      - USB
      - SATA / AHCI
      
      Support for other interfaces will follow.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Neta Zur Hershkovits <neta@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Omri Itach <omrii@marvell.com>
      Cc: Igal Liberman <igall@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      6f8c2d49
    • S
      arm64: mvebu: Add Armada 3700 db-88f3720 development board support · 01e62c7f
      Stefan Roese 提交于
      This patch adds basic support for the Marvell Armada 3700 DB-88F3720
      development board. Supported are the following interfaces:
      - UART
      - SPI (incl. SPI NOR)
      - I2C
      - Ethernet
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Wilson Ding <dingwei@marvell.com>
      Cc: Victor Gu <xigu@marvell.com>
      Cc: Hua Jing <jinghua@marvell.com>
      Cc: Terry Zhou <bjzhou@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      01e62c7f
    • S
      drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 3k · 3335786a
      Stefan Roese 提交于
      This version is based on the Marvell U-Boot version with this patch
      applied as latest patch:
      
      Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb
      device mode" from 2016-07-05.
      Signed-off-by: NStefan Roese <sr@denx.de>
      Cc: Nadav Haklai <nadavh@marvell.com>
      Cc: Kostya Porotchkin <kostap@marvell.com>
      Cc: Wilson Ding <dingwei@marvell.com>
      Cc: Victor Gu <xigu@marvell.com>
      Cc: Hua Jing <jinghua@marvell.com>
      Cc: Terry Zhou <bjzhou@marvell.com>
      Cc: Hanna Hawa <hannah@marvell.com>
      Cc: Haim Boot <hayim@marvell.com>
      3335786a
    • T
      dfu: Migrate to Kconfig · 6828e602
      Tom Rini 提交于
      Introduce a hidden USB_FUNCTION_DFU Kconfig option and select it for
      CMD_DFU (as we must have the DFU command enabled to do anything DFU).
      Make all of the entries in drivers/dfu/Kconfig depend on CMD_DFU and add
      options for all of the back end choices that DFU can make use of.
      
      Cc: Lukasz Majewski <l.majewski@samsung.com>
      Signed-off-by: NTom Rini <trini@konsulko.com>
      Acked-by: NLukasz Majewski <l.majewski@samsung.com>
      6828e602
    • T
      ti_armv7_common.h: Adjust malloc pool size in all cases. · 5e61b0df
      Tom Rini 提交于
      Previously we had been adjusting CONFIG_SYS_MALLOC_LEN based on if
      CONFIG_DFU_MMC has been set or not.  However, for quite some time this
      has not been the case as we often include <configs/ti_armv7_common.h>
      prior to setting CONFIG_DFU_MMC so we would always use 16MiB and then
      not have enough room for to DFU files.  Given the amount of memory we
      always have, setting a minimum size of 32MiB for malloc is reasonable.
      However, in the SPL case not only do we not need that much we start
      running into overlap problems and then will fail to boot.  Since we
      don't need 16MiB in the SPL case, bring this down to 8MiB.
      Signed-off-by: NTom Rini <trini@konsulko.com>
      5e61b0df
    • H
      kconfig: introduce kconfig for UBI · 8f2fe0c8
      Heiko Schocher 提交于
      move the UBI config options into Kconfig.
      Signed-off-by: NHeiko Schocher <hs@denx.de>
      Reviewed-by: NSimon Glass <sjg@chromium.org>
      Reviewed-by: NAndrew F. Davis <afd@ti.com>
      Reviewed by: Evgeni Dobrev <evgeni at studio-punkt.com>
      8f2fe0c8
  6. 26 9月, 2016 1 次提交