Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.
Signed-off-by: NAndrew F. Davis <afd@ti.com>

Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.
Signed-off-by: NAndrew F. Davis <afd@ti.com>

Enable watchdog and reboot with watchdog in the configuration.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

Enable watchdog and reboot with watchdog in the configuration.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

This commit add watchdog and sysreset watchdog
in the bcm6858 device tree.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

This commit add watchdog and sysreset watchdog
in the bcm6838 device tree.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

This IP is also used on some arm SoC, so we allow to
use it on arm bcm6858 too.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>

This driver is used on several big endian mips board.
So we could use raw I/O function instead of forcing
big endian access.
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com>

Some platforms choose to store device tree blob in Android image second
area.  Let's try to look for dtb from there when booting an Android
image, and use it for booting if found.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NTom Rini <trini@konsulko.com>

Rsync all defconfig files using moveconfig.py
Signed-off-by: NTom Rini <trini@konsulko.com>

- SPI-NOR support

Add myself as co-maintainer for U-Boot SPI NOR subsystem.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
[jagan: drop mtd/spi file from SPI entry]
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Now that new SPI NOR layer uses stateless 4 byte opcodes by default,
don't enable SPI_FLASH_BAR. For SPI controllers that cannot support
4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c,
renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to
not break functionality.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

SF_DUAL_FLASH claims to enable support for SF_DUAL_STACKED_FLASH and
SF_DUAL_PARALLEL_FLASH. But, in current U-Boot code, grepping for above
enums yield no user and therefore support seems to be incomplete. Remove
these configs so as to avoid confusion.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

SPL only needs to be able to read from SPI Flash to load next stage and
does not really need write/erase etc. Therefore in order to reduce SPI
Flash code size in SPL, enable SPI_FLASH_TINY, that only supports
reading from SPI flash, as default.

Note: Since, SPI_FLASH_TINY does not support SPI_FLASH_BAR,
SPI_FLASH_TINY is not enabled for boards with SPI controllers that
cannot support 4 byte addressing.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Add a tiny SPI flash stack that just supports reading data/images from
SPI flash. This is useful for boards that have SPL size constraints and
would need to use SPI flash framework just to read images/data from
flash. There is approximately 1.5 to 2KB savings with this.

Based on prior work of reducing spi flash id table by
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

spi_flash and spi_flash_ids are no longer needed after SPI NOR
migration. Remove them.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD
layer. Fix up sf_dataflash to work in legacy way. And update sandbox to
use new interfaces/definitions
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible
SPI Flash device nodes. Therefore make U-Boot also to look for the same
compatible string so that we can use Linux DTS files as is.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework
Signed-off-by: NVignesh R <vigneshr@ti.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Sync Serial Flash Discoverable Parameters (SFDP) parsing support from
Linux. This allows auto detection and configuration of Flash parameters.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Add hweight*() macros required for moving to new SF layer
Signed-off-by: NVignesh R <vigneshr@ti.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Add non DM version of SPI_MEM to support easy migration to new SPI NOR
framework. This can be removed once DM_SPI conversion is complete.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

It is necessary to call spi_claim_bus() before starting any SPI
transactions and this restriction would also apply when calling spi-mem
operations. Therefore claim and release bus before requesting transfer
via exec_op.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

Extend spi_mem_adjust_op_size() to take spi->max_write_size and
spi->max_read_size into account.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

SPI controllers support all types of SPI modes including dual/quad bus
widths. Therefore remove constraint wrt SPI mode from spi-mem layer.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Tested-by: NSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

In arch/sandbox/include/asm/types.h we have
Therefore for 32 bit Sandbox build BITS_PER_LONG turns out to be 32 as
CONFIG_PHYS64 is not set

This messes up the current logic of GENMASK macro due to mismatch b/w
size of unsigned long (64 bit) and that of BITS_PER_LONG.
Fix this by using CONFIG_SANDBOX_BITS_PER_LONG which is set to 64/32
based on the host machine on which its being compiled.

Without this patch:
GENMASK(14,0) => 0x7fffffffffff
After this patch:
GENMASK(14,0) => 0x7fff
Signed-off-by: NVignesh R <vigneshr@ti.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Completely move CONFIG_SPI_FLASH from remaining board header files to
defconfigs
Signed-off-by: NVignesh R <vigneshr@ti.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed

commit fdce9d35 ("arm: dts: am33xx: Sync dts with Linux 4.20.0")
did remove the "u-boot,dm-spl" flag from the 'ocp' bus which was
introduced with
commit 19aa4ac0 ("dts: am33xx: add u-boot, dm-spl to ocp bus")

Due to this all boards having CONFIG_SPL_OF_CONTROL enabled are broken
because they cannot bind/probe the boot-media interface during SPL
stage.

This commit introduces the 'am33xx-u-boot.dtsi' which is included with
the auto include mechanism. The am33xx-u-boot-dtsi adds the important
"u-boot,dm-pre-reloc" to the 'ocp bus' (the root bus of almost all
peripherals, at least the bootable ones).

The peripherials (mmc, spi, ...) needed during SPL stage need to be
equipped with the 'u-boot,dm-pre-reloc' in their responsible dts file.
Signed-off-by: NHannes Schmelzer <hannes.schmelzer@br-automation.com>

Update Atmel AT91 maintainership
Signed-off-by: NEugen Hristev <eugen.hristev@microchip.com>
Acked-by: NNicolas Ferre <nicolas.ferre@microchip.com>

Change maintainers to Prabhakar Kushwaha for fsl-qoriq, mpc85xx
and mpc86xx.
Signed-off-by: NYork Sun <york.sun@nxp.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

- Move Armada XP / 38x PCIe driver to DM_PCI from me
- Move Armada XP / 38x LCD driver to DM_VIDEO from me
- Add uDPU board (Armada-3720) from Vladimir

[trini: Fix warning in pci-uclass.c by removing ret from
	pci_uclass_child_post_bind as it no longer calls functions with
        a return code to catch.]
Signed-off-by: Tom Rini <trini@konsulko.com>II

Removes artifacts (.rej-files) from the last merge.

With the new DM_VIDEO support in the Armada XP LCD driver, this patch
adds the needed DT node for the LCD controller to the theadorable dts
file. This DT property is not added to the Armada XP dtsi files, as this
LCD feature is pretty unusual for this SoC and I personally know of no
other board that uses this controller.

This patch also enables CONFIG_BMP_16BPP/24BPP/32BPP, as the "old" bmp
command supported these BMP files.
Signed-off-by: NStefan Roese <sr@denx.de>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Acked-by: NAnatolij Gustschin <agust@denx.de>

This patch moves the Armada XP video / LCD driver to DM_VIDEO. With this
move, the legacy interface board_video_init() is removed from the
theadorable board code (only user of this video driver). The support
via DT will be added in a separate patch.

This patch also enables DM_VIDEO for the theadorable board, as this is
needed to not break git bisect'ability.
Signed-off-by: NStefan Roese <sr@denx.de>
Reviewed-by: NAnatolij Gustschin <agust@denx.de>
Acked-by: NAnatolij Gustschin <agust@denx.de>

This adds initial support for micro-DPU (uDPU) board which is based on Armada-3720 SoC.
micro-DPU is the single-port FTTdp "distribution point unit" made by Methode Electronics
which offers complete modularity with replaceable SFP modules both for uplink and downlink
(G.hn over twisted-pair, G.hn over coax, 1G and 2.5G Ethernet over Cat-5e cable).

On-board features:
- 512 MiB DDR3
- 2 x 2.5G SFP via HSGMII SERDES interface to the A3720 SoC
- USB 2.0 Type-C connector
- 4GB eMMC
- ETSI TS 101548 reverse powering via twisted pair (RJ45) or coax (F Type)

Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Luis Torres <luis.torres@methode.com>
Cc: Scott Roberts <scott.roberts@telus.com>
Cc: Paul Arola <paul.arola@telus.com>
Signed-off-by: NVladimir Vid <vladimir.vid@sartura.hr>
Reviewed-by: NStefan Roese <sr@denx.de>
Signed-off-by: NStefan Roese <sr@denx.de>