- 03 12月, 2018 27 次提交
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由 Christophe Leroy 提交于
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL Signed-off-by: NChristophe Leroy <christophe.leroy@c-s.fr>
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由 Christophe Leroy 提交于
Reported-by: NJoakim Tjernlund <Joakim.Tjernlund@infinera.com> Signed-off-by: NChristophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: NJoakim Tjernlund <Joakim.Tjernlund@infinera.com>
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由 Philippe Reynes 提交于
This update the its file used in vboot test to respect the new node style name defined in doc/uImage.FIT (for example: replace kernel@1 by kernel and fdt@1 by fdt-1) Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philippe Reynes 提交于
The padding pss is now supported for rsa signature. This add test with padding pss on vboot test. Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philippe Reynes 提交于
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philippe Reynes 提交于
Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philippe Reynes 提交于
We add the support of the padding pss for rsa signature. This new padding is often recommended instead of pkcs-1.5. Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philippe Reynes 提交于
The rsa signature use a padding algorithm. By default, we use the padding pkcs-1.5. In order to add some new padding algorithm, we add a padding framework to manage several padding algorithm. The choice of the padding is done in the file .its. Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philippe Reynes 提交于
Previous implementation of the rsa signature was using the openssl API EVP_Sign*, but the new openssl API EVP_DigestSign* is more flexible. So we move to this new API. Signed-off-by: NPhilippe Reynes <philippe.reynes@softathome.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Lukasz Majewski 提交于
After this change the m41t62.c can be used with RTC subsystem (i.e. date command) which uses device model (DM). Signed-off-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Lukasz Majewski 提交于
This change facilitates the conversion of m41t62 RTC driver to device model (DM). Signed-off-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Lukasz Majewski 提交于
No functional change for this commit. Signed-off-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NStefan Roese <sr@denx.de>
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由 Lukasz Majewski 提交于
This patch moves the RTC M41T62 config define to Kconfig. Signed-off-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NStefan Roese <sr@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Lukasz Majewski 提交于
After this change the 'eeprom' command can be used with DM aware boards. Signed-off-by: NLukasz Majewski <lukma@denx.de>
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由 Yegor Yefremov 提交于
Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig and select them in Kconfig. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Yegor Yefremov 提交于
Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT feature won't be used. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Yegor Yefremov 提交于
OnRISC Baltos series uses SoM with tps65910 PMIC, so remove "power/tps65217.h" header inclusion. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Yegor Yefremov 提交于
Use DM for both MMC and USB subsystems and use dedicated DTS for U-Boot configuration. Disable SPL support for GPIO and remove EVMSK leftover for DDR power control via GPIO. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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git://git.denx.de/u-boot-amlogic由 Tom Rini 提交于
ARM: meson: Add regmap support for clock driver and sync DT with 4.19
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由 Loic Devulder 提交于
This patch modifies the meson clock driver to use syscon/regmap like the Linux kernel does, as it is needed if we want to share the same DTS files. DTS files are synchronized from Linux 4.19. Signed-off-by: NLoic Devulder <ldevulder@suse.de> Acked-by: NNeil Armstrong <narmstrong@baylibre.com>
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git://git.denx.de/u-boot-arc由 Tom Rini 提交于
We introduce much better automatic identification of ARC cores. 1. Try to match found HW features to known ARC core templates 2. Print CPU frequency for all ARC boards 3. Add more board-specific info
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由 Alexey Brodkin 提交于
This allows us to print nice board name on boot. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Instead of "base + offset" define all registers right away and access them later via direct defines. Generate bit masks with "BIT" macro. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
We do real CPU clock measurement with help of built-in counters. Thus we may accommodate different real clock values that appear in different FPA images instead of relying on something hard-coded in the .dtb. And while at it make make SDIO base address define look similar to others with casting to "(void *)". Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
Since we now do advanced CPU identification in generic ARC code there's no need to have per-board hardcoded data. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
1. Try to guess a ARC core template that was used i.e. not just name a core family but something more menaingful like "ARC HS38", "ARC EM11D" etc. We do it checking availability of the key differentiation features like: - Caches (we actually only check for L1 I$ fpr simplicity) - XY-memory - DSP extensions etc. 2. Identify ARC subsystems 3. Print core clock frequency Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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由 Alexey Brodkin 提交于
On v2 boards that will hit real stock we'll have 16 Mb of RAM. Note on v1 boards (if anybody ever get one out of trash bin) this leads to U-Boot execution freeze in the middle ofthe relocation so don't be surprised. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
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- 02 12月, 2018 2 次提交
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由 Heinrich Schuchardt 提交于
Variable 'days' must be defined as signed int. Otherwise the conversion fails for some dates, e.g. 2004-08-25. Cf function rtc_time64_to_tm() in the Linux kernel source. Fixes: 992c1db4 "drivers: rtc: resolve year 2038 problem in rtc_to_tm" Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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git://git.denx.de/u-boot-rockchip由 Tom Rini 提交于
Improvements: - RK3188 USB-UART functionality - errors triggering a hard-stop in SPL on the RK3399 are reported - Rockchip RV1108 (SoC) support - MicroCrystal RV3029 (RTC) DM driver Fixes: - RK3188 early UART setup - limit SD-card frequency to 40MHz on the RK3399-Q7 - MIPI fixes - RK3399 CPUB clock initialisation
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- 01 12月, 2018 11 次提交
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git://git.denx.de/u-boot-dm由 Tom Rini 提交于
Fix sound on sandbox Convert TPM fully to DM Tidy up sandbox I2C emulation Add a 'make qcheck' target for faster testing A few other misc things (dropped the final patch which breaks clang for some reason)
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git://git.denx.de/u-boot-mips由 Tom Rini 提交于
- MIPS: MT76xx: minor fixes and updates to gardena-smart-gateway board
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由 Kever Yang 提交于
Sync with other rockchip SoCs, use board_debug_uart_init() to init default UART iomux. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Christoph Muellner 提交于
This patch sets the PLL of CPU cluster B (BPLL) to 600 MHz. This decreases the boot time of Linux 4.19 by about 8%. The 600 MHz are inspired by the 600 MHz used for LPLL initialization (came in with commit 9f636a24). Tested on RK3399-Q7 on Haikou base board. Signed-off-by: NChristoph Muellner <christoph.muellner@theobroma-systems.com> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Philipp Tomsich 提交于
The "Flamingo" carrier-board for the RK3399-Q7 has a RV3029 populated and the application will use the off-module RV3029 RTC including the battery backed SRAM. To support this use case, this commit includes the following changes: * updates the rv3029 driver to use DM * implements the read8/write8 operations This syncs the implementation with the Linux code (based on 4.17), porting the trickle-charger support from there (with improvements to avoid unnecessary EEPROM updates) and adheres to the Linux DTS binding. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: NKlaus Goger <klaus.goger@theobroma-systems.com>
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由 Philipp Tomsich 提交于
The MicroCrystal RV3029 driver didn't have a Kconfig entry and was not used anywhere. Add it to Kconfig to make it selectable. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: NKlaus Goger <klaus.goger@theobroma-systems.com>
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由 Otavio Salvador 提交于
This allow easier integration of RV1108 based boards on generic distributions and build systems. To avoid behavior change, we make evb-rv1108 to use the existing environment as it boots from its SPI NOR. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Otavio Salvador 提交于
This adds the definitions need to use the USB OTG in rv1108 board. This has been tested using USB Mass Storage to export and program a eMMC device. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Otavio Salvador 提交于
Like it is done for other Rockchip SoCs, introduce a board_usb_init() function so that USB OTG can be functional on rv1108 too. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Otavio Salvador 提交于
This adds the pinctrl handles to enable the use of eMMC on custom boards (as minievk) and makes it easier for later addition. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Otavio Salvador 提交于
In order to be able to build the Rockchip eMMC driver on rv1108, the BOUNCE_BUFFER option needs to be selected. Select it like it is done on the other Rockchip SoC common files. Reviewed-by: NAndy Yan <andy.yan@rock-chips.com> Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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