- 15 1月, 2020 3 次提交
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由 Giulio Benetti 提交于
Before set_rate() pllv3 needs enable() to power the pll up. Add enable() taking into account different power_bit and different powerup_set, because some pll needs its power_bit to be set or reset to be powered on. Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
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由 Giulio Benetti 提交于
div_mask is different for GENERIC and USB pll, so set it according. Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: NLukasz Majewski <lukma@denx.de>
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由 Giulio Benetti 提交于
Better to register the 2 clock as 2 different drivers because they work slightly differently depending on power_bit and powerup_set bits coming on next patches. Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: NLukasz Majewski <lukma@denx.de>
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- 19 7月, 2019 1 次提交
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由 Lukasz Majewski 提交于
This patch brings the files from Linux kernel (linux-stable/linux-5.1.y SHA1: 5752b50477da)to provide clocks support as it is used on the Linux kernel with Common Clock Framework [CCF] setup. The directory structure has been preserved. The ported code only supports reading information from PLL, MUX, Divider, etc and enabling/disabling the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic to the alias numbering as the information about the clock is read from the device tree. One needs to pay attention to the comments indicating necessary for U-Boot's driver model changes. If needed, the code can be extended to support the "set" part of the clock management. Signed-off-by: NLukasz Majewski <lukma@denx.de>
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