- Use correct flash sector size
- Use correct memory test end address
- Add support for bzip2 compression
- Various small fixes
Patch by Yuli Barcohen, 05 Jun 2005

- Fix SDRAM timing on both local bus and 60x bus
- Add support for second flash bank (SIMM)
- Change boot flash base
Patch by Yuli Barcohen, 05 Jun 2005

add support for second FEC on Adder87x board.
Patch by Yuli Barcohen, 05 Jun 2005

Controller.

 * For READ_STATUS and READID commands always 8 bytes need to be read from
   NDDB. Otherwise they stay there and get send to flash as the first data
   word when writing.

 * In nand_base.c the oob variable is not reset so this->oob_buf is
   overwritten what eventually screws up the bad block descriptor table.

code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for
NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is
implemented for these boards.

 * Debug message can be turned on and off.
 * Waiting for events now times out.
 * Implemented RESET command.
 * Added appropriate nand_bbt_descriptor and nand_oobinfo.

Remaining Problems:
 * Read Status still behaves weird an returns invalid stuff sometimes.
 * ECC Placement does not respect our scheme in nand_oobinfo.

use hush shell.

Patch by Stefan Roese, 28 Feb 2006

we only see 64MB.

Minimally modified patch by Bluetechnix, Vienna

Signed-off-by: NHeiko Schocher <hs@denx.de>

zylonite). Minor pxa-regs.h update.

Register Definitions.

It doesn't run yet.

Patch by Reinhard Arlt, 8 Feb 2006

Patch by Matthias Fuchs, 07 Feb 2006

Insert missing __le32_to_cpu() for filesize in ext2fs_read_file().

Patch by Reinhard Arlt, 30 Dec 2005

PMC405 and CPCI2DP: Added firmware download and booting via pci.

Patch by Matthias Fuchs, 20 Dec 2005

(without bank-switching only 32 MB can be accessed)

With 64 kb uniform flash sector size the old value of 128 kB was
too small.

- Support for TQM8541/8555 boards added.
- Complete rework of TQM8540/8560 support.
- Common TQM85xx code now supports all current TQM85xx platforms
  (TQM8540/8541/8555/8560).
- DDR SDRAM size detection added.
- CAS latency default values can be overwritten by setting "serial#"
  to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used.
  If problems are detected with this non default CAS latency,
  the defualt values will be used instead.
- FLASH size detection added.
- Moved FCC ethernet driver initialization behind TSEC driver init
  -> TSEC is first device.

Patch by Stefan Roese, 30 Nov 2005

Patch by John Otken, 23 Nov 2005