This patch intends to add DDR3 initialization code for Exynos5420.
Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com>
Signed-off-by: NRajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Adds base addresses of various IPs and controllers required for
Exynos5420.
Signed-off-by: NRajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.
Signed-off-by: NVikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>

This patch makes the necessary changes for making use of
I2S0 channel instead of I2S1 channel on smdk board. This
changes are done to maintain the uniformity to use I2S0 channel.
Signed-off-by: NDani Krishna Mohan <krishna.md@samsung.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: NTom Rini <trini@ti.com>

This patch performs the following:

1) Convert the assembly code for memory and clock initialization to C code.
2) Move the memory and clock init codes from board/samsung to arch/arm
3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted
   the common lowlevel_init from assembly to C-code
4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5.
5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already
   done in _main.
6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250.

TEST: Tested SD-MMC boot on SMDK5250 and Origen.
      Tested USB and SPI boot on SMDK5250
      Compile tested for SMDKV310.
Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

For tracing to work it has to be able to access the microsecond timer
without causing a recursive call to the function entry/exit handlers.
Add attributes to the relevant functions to support this.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NSimon Glass <sjg@chromium.org>

This requires that cpu_is_exynos4/5 should be made available before tzpc_init.
Hence this patch also makes necessary changes to have cpu_info in spl and
invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250.
Signed-off-by: NInderpal Singh <inderpal.singh@linaro.org>
Acked-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Fix the indentation of some defines by tab.
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: NARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: NAkshay Saraswat <akshay.s@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>

This patch populates base addresses of Exynos4x12 registers.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch add the spacing for i2c for Exynos4
Signed-off-by: NPiotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>

Add base address definition for SPI device on Exynos.
Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: NHatim Ali <hatim.rv@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch adds base address for I2S
Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: NChander Kashyap <chander.kashyap@gmail.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Based upon single SoC there can be multiple variants.
This patch add support to match the complete product ID.
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>

This patch add display port base address for EXYNOS5. In case of EXYNOS4,
use DEVICE_NOT_AVAILABLE macro because DP is not supported.
Signed-off-by: NDonghwa Lee <dh09.lee@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch defined EXYNOS5_I2C_SPACING used to calculate I2C channel
base address.
Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>

This patch adds the base address for I2C.
Signed-off-by: NAlim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: NSimon Glass <sjg@chromium.org>

This patch corrects the base addresses for USB_PHY and USB_OTG.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: NChander Kashyap <chander.kashyap@linaro.org>
Acked-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch incorates the review comments given by Minkyu Kang for
EHCI support on EXYNOS
Signed-off-by: NRajeshwari Shinde <rajeshwari.s@samsung.com>

Since Exynos architecture have new SoCs,
need to fix cpuinfo correctly.
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Cc: Chander Kashyap <chander.kashyap@linaro.org>

This is definitions of system registers and power mananagement registers for EXYNOS SoC.
Signed-off-by: NDonghwa Lee <dh09.lee@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of
SoCs. This patch adds the support for Exynos5.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This patch adds power.h and SAMSUNG_BASE() macro for using Exynos4 power.
Signed-off-by: NHeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

This commit enables support for USB Gadgets on the Exynos4210 (C210 Universal)
reference target.
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
CC: Remy Bohmer <linux@bohmer.net>

As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15
based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15
based SoC's will be sub-classified as Exynos4 and Exynos5 respectively.

In order to better adapt and reuse code across various upcoming Samsung Exynos
based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in
this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix
are renamed as exynos4/EXYNOS4.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

S5PC210 SoC have two cpu revisions, and have some difference.
So, support the cpu revision for each revision.
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>

S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor.
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>