- 10 6月, 2017 1 次提交
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由 Tom Rini 提交于
Almost all users of CONFIG_AM33XX/AM43XX have been migrated. Finish moving the last few over to Kconfig, and put all of the boards under the appropriate Kconfig chocie now. This board choice is non-optional, so remove that keyword on am33xx. Signed-off-by: NTom Rini <trini@konsulko.com>
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- 09 6月, 2017 4 次提交
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由 Vikas Manocha 提交于
With xip booting configuration, we don't need to copy the next image (U-Boot or linux xipimage) from flash to sdram area. Flash memory organization is like this: spl-U-Boot: u-boot-spl.bin : 0x0800_0000 U-Boot : u-boot-dtb.bin : 0x0800_8000 linux : xipImage : 0x0800_8000 It is also possible to have U-Boot binary & linux binaries configured at different addresses of flash memory like U-Boot at 0x0800_8000 & linux xipImage at 0x0800_4000. But in any case, spl-U-Boot needs to be compiled for U-Boot as next binary with SPL_OS_BOOT option disabled. By default, spl is configured to boot linux xipImage. Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
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由 Vikas Manocha 提交于
Signed-off-by: NVikas Manocha <vikas.manocha@st.com>
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由 Vikas Manocha 提交于
Enable support for XIP (execute in place) of U-Boot or kernel image. There is no need to copy image from flash to ram if flash supports execute in place. Signed-off-by: NVikas Manocha <vikas.manocha@st.com> Reviewed-by: NAlexandru Gagniuc <alex.g@adaptrum.com>
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由 Vikas Manocha 提交于
This commit supports booting from stm32 internal nor flash. spl U-Boot initializes the sdram memory, copies next image (e.g. standard U-Boot) to sdram & then jumps to entry point. Here are the flash memory addresses for U-Boot-spl & standard U-Boot: - spl U-Boot : 0x0800_0000 - standard U-Boot : 0x0800_8000 To compile u-boot without spl: Remove SUPPORT_SPL configuration (arch/arm/mach-stm32/Kconfig) Signed-off-by: NVikas Manocha <vikas.manocha@st.com> [trini: Rework Kconfig logic a bit] Signed-off-by: NTom Rini <trini@konsulko.com>
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- 08 6月, 2017 9 次提交
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由 Philipp Tomsich 提交于
This commit enables the RK3399 HDMI TX, which is very similar to the one found on the RK3288. As requested by Simon, this splits the HDMI driver into a SOC-specific portion (rk3399_hdmi.c, rk3288_hdmi.c) and a common portion (rk_hdmi.c). Note that the I2C communication for reading the EDID works well with the default settings, but does not with the alternate settings used on the RK3288... this configuration aspect is reflected by the driverdata for the RK3399 driver. Having some sort of DTS-based configuration for the regulator dependencies would be nice for the future, but for now we simply use lists of regulator names (also via driverdata) that we probe. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
This commit adds a driver for the RK3399 VOPs capable and all the necessary plumbing to feed the HDMI encoder. For the VOP-big, this correctly tracks the ability to feed 10bit RGB data to the encoder. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
To prepare for adding the RK3399 VOP driver (which shares most of its registers and config logic with the RK3228 VOP), this change refactors the driver and splits the RK3288-specific driver off. The changes in detail are: - introduces a data-structure for chip-specific drivers to register features/callbacks with the common driver: at this time, this is limited to a callback for setting the pin polarities (between the VOP and the encoder modules) and a flag to signal 10bit RGB capability - refactors the probing of regulators into a helper function that can take a list of regulator names to probe and autoset - moves the priv data-structure into a (common) header file to be used by the chip-specific drivers to provide base addresses to the common driver - uses a callback into the chip-specific driver to set pin polarities (replacing the direct register accesses previously used) - splits enabling the output (towards an encoder) into a separate help function withint the common driver Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Romain Perier 提交于
RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit 0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and introduces random delays and data lose. This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE with the right shift. Signed-off-by: NRomain Perier <romain.perier@collabora.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
This adds the DDR3-1866 timing via its own DTS and wires it up. This (currently) is not the default timing for the RK3399-Q7 and should be selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
This adds the DDR3-1333 timing via its own DTS and wires it up. This is not the default timing for the RK3399-Q7 and should be selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE). Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
To better support different RAM timings (DDR3-1333 and DDR3-1866 are assembly options for the RK3399-Q7), this refactors the DTS support and renames the default DTS variant from rk3399-puma to rk3399-puma-ddr1600: - changes the rk3399-puma DTS into a board-specific DTSI by removing the inclusion of the DRAM timings - adds a new rk3399-puma-ddr1600.dts, which includes the (new) common board DTSI and the DDR3-1600 timing DTSI - wires this up from arch/arm/dts/Makefile and configs/puma-rk3399_defconfig Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
The Linux DTS for the RK3399-Q7 has moved with the times... resync against it to ensure a consistent configuration. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
This commit enables HDMI output in the DTS by adding the necessary nodes to vopl/vopb and by adding the HDMI node. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 07 6月, 2017 24 次提交
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由 Andy Yan 提交于
Add basic support for rv1108 evb, whith this patch we can boot into u-boot console. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Yan 提交于
RV1108 is embedded with an ARM Cortex-A7 single core and a DSP core from Rockchip. It is designed for varies application scenario such as car DVR, sports DV, secure camera and UAV camera. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Yan 提交于
Add clock driver support for Rockchip rv1108 soc Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Yan 提交于
Add pinctrl support for Rockchip rv1108 soc Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Klaus Goger 提交于
defines the spl-payload to 256k (0x40000) Signed-off-by: NKlaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
On the RK3399-Q7, the on-module USB3 hub is held in reset at boot-up to save power and needs to be woken up using GPIO4A3. Note that this is not a negated reset-signal (due to a level shifter being needed for this signal anyway), but a negated enable-signal: to enable, we need to output LOW (i.e. 0)... so we mark this as an ACTIVE_LOW signal. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
With the validation done for DDR3-1866 (i.e. 933 MHz bus clock), we can now add the timings (rk3399-sdram-ddr3-1866.dtsi) for boards built with the DDR3-1866 option. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
The RK3399 is capable of driving DDR3 at 933MHz (i.e. DDR3-1866), if the PCB layout permits and appropriate memory timings are used. This changes the sanity checks to allow a DTS to request DDR3-1866 operation. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: NKlaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Philipp Tomsich 提交于
Revise the loop watching for a timeout on obtaining a DRAM PHY lock to clearly state a timeout in milliseconds and use get_timer (based on the ARMv8 architected timer) to detect a timeout. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Meng Dongyang 提交于
Signed-off-by: NMeng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Meng Dongyang 提交于
Signed-off-by: NMeng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
In rk3328, some function pin may have more than one choice, and muxed with more than one IO, for example, the UART2 controller IO, TX and RX, have 3 choice(setting in com_iomux): - M0 which mux with GPIO1A0/GPIO1A1 - M1 which mux with GPIO2A0/GPIO2A1 - usb2phy which mux with USB2.0 DP/DM pin. We should not decide which group to use in pinctrl driver, for it may be different in different board, it should goes to board file, and the pinctrl file should setting correct iomux depends on the com_iomux value. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
Move GRF register bit definition into GRF header file, remove 'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro definition in grf header file and pinctrl driver. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
- hclk/pclk_div range should use '<=' instead of '<' - use GPLL for pd_bus clock source - pd_bus HCLK/PCLK clock rate should not bigger than ACLK Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
Embeded the shift in mask MACRO definition in cru header file and clock driver. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Yan 提交于
PX5 EVB is designed by Rockchip for automotive field with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS HDMI video input/output interface, audio codec ES8396, WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity sensor STK3410. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andreas Färber 提交于
The GeekBox is a TV box from GeekBuying, based on an MXM3 module. The module can be used with base boards such as the GeekBox Landingship. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Yan 提交于
Sheep board is designed by Rockchip as a EVB for rk3368. Currently it is able to boot a linux kernel and system to console with the miniloader run as fist level loader. Reviewed-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NAndy Yan <andy.yan@rock-chips.com>
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由 Andreas Färber 提交于
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Yan 提交于
Add driver to support iomux setup for the most commonly used peripherals on rk3368. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Andy Yan 提交于
Add driver to setup the various PLLs and peripheral clocks on the RK3368. Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
Some host like SD and eMMC may use DMA to transter data to SRAM, set memory to non-secure to make sure the address can be accessed. The security of SRAM in OS suppose to initialized in ATF bl31, and the SPL is before the bl31. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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- 06 6月, 2017 2 次提交
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由 Phil Edworthy 提交于
The branch instruction only has an 11-bit relative target address, which is sometimes not enough. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
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由 Phil Edworthy 提交于
Rather than change asm files that come from Linux, add the symbols to Kconfig. Since one of the symbols is for thumb2 builds, make CPU_V7M always select them. Signed-off-by: NPhil Edworthy <phil.edworthy@renesas.com>
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