Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Kshitij Gupta <kshitij@ti.com>
Acked-by: NTom Rini <trini@ti.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

Signed-off-by: NWolfgang Denk <wd@denx.de>

Add the initial support for Freescale i.MX6Q Armadillo2 board
Support: MMC boot from slot 0/1, debug UART(UART4), usdhc.

There is two MMC slots on the boards:
mmc dev 0 -> connect USDHC3 -> the lower slot on the board,
mmc dev 1 -> connect USDHC4 -> the upper slot on the board,
Signed-off-by: NJason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: NDirk Behme <dirk.behme@de.bosch.com>

As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15
based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15
based SoC's will be sub-classified as Exynos4 and Exynos5 respectively.

In order to better adapt and reuse code across various upcoming Samsung Exynos
based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in
this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix
are renamed as exynos4/EXYNOS4.
Signed-off-by: NChander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: NMinkyu Kang <mk7.kang@samsung.com>

Ventana is a board which is very similar to Seaboard. Support it by
re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals.

v5: Makefile: Use cmd_link_o_target, remove unused clean/distclean targets.
v6: Make gpio_config_uart_seaboard() static.
v7: Add MAINTAINERS entry for Ventana. Tom Warren doesn't have Ventana, so
    he asked me to add myself for this board.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NTom Warren <twarren@nvidia.com>

The eXMeritus HWW-1U-1A unit is a DO-160-certified 13lb 1U chassis
with 3 independent TEMPEST zones.  Two independent P2020 computers may
be found inside each zone.  Complete hardware support is included.

High-level hardware overview:
  * DO-160 certified for passenger aircraft (noncritical)
  * TEMPEST ceritified for RED/BLACK separation
  * 3 zones per chassis, 2 computers per zone (total of 6)
  * Dual-core 1.066GHz P2020 per computer
  * One 2GB DDR2 SO-RDIMM module per computer (upgradable to 4GB)
  * Removable 80GB or 160GB Intel X18-M SSD per computer
  * Front-accessible dual-port E1000E per computer
  * Front-accessible serial console per computer
  * Front-accessible USB port per computer
  * Internal Gigabit crossover within each TEMPEST zone
  * Internal unidirectional fiber links across TEMPEST zones
  * Battery-backed DS1339 I2C RTC on each CPU.

Combined, each 13lb 1U chassis contains 12GB RAM, 12 cores @ 1.066GHz,
12 front-accessible Gigabit Ethernet ports and 960GB of solid-state
storage with a total power consumption of ~200W.

Additional notes:
  * SPD detection is only known to work with the DO-160-certified DIMMs

  * CPU reset is a little quirky due to hardware misfeature.  Proper
    support for the hardware reset mechanism has been left for a later
    patch series to address.
Signed-off-by: NKyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The "rmu" board has long been unmaintained, and is broken.
Remove it.
Signed-off-by: NWolfgang Denk <wd@denx.de>

The OXC board has long been unmaintained, and is broken.
Remove it.
Signed-off-by: NWolfgang Denk <wd@denx.de>

The BAB7xx boards are almost deceased.  They cause build warnings, an
it's not worth the effort to fix these.  Remove the dead body.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>

- booting from NOR Flash with direct boot method
- POST support
- LOGBUF support
Signed-off-by: NHeiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Christian Riesch <christian.riesch@omicron.at>

Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>

The board is unmaintained and maintainer doesn't respond.
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>

The board is unmaintained and maintainer doesn't respond.
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>

The board is unmaintained and maintainer doesn't respond.
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>

The board is unmaintained and maintainer doesn't respond.
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>

Add support for the Ethernut 5 open hardware design, based
on Atmel's AT91SAM9XE512 SoC.

V4
 - Fix several coding style issues.
 - Move machine type to config file.
 - Remove use of CONFIG_ATMEL_LEGACY.
Signed-off-by: NTim Schendekehl <tim.schendekehl@egnite.de>

This patch groups together all the common functions for LaCie boards:
Ethernet PHY and MAC address initializations.

Moreover the configurations for LaCie Kirkwood boards are merged into
a single file: include/configs/lacie_kw.h
Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>

This patch adds support for the LaCie 2Big Network v2 board, based on
the Marvell Kirkwood 6281 SoC.

Additional information is available at:
http://lacie-nas.org/doku.php?id=2big_network_v2Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>

The ecovec board has SH7724, 256MB DDR2-SDRAM, USB,
Ethernet, and more.

This patch supports the following functions:
	- 256MB DDR2-SDRAM
	- USB
	- I2C
	- Ethernet
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Board support for the Guntermann & Drunck Io64.
Signed-off-by: NDirk Eibach <eibach@gdsys.de>
Signed-off-by: NStefan Roese <sr@denx.de>

This adds support for the Freescale COM Express P2020 board. This board
is similar to the P1_P2_RDB, but has some extra (as well as missing)
peripherals.

Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
Using the HRESET_REQ register does not work.

This board has no NOR flash, and can only be booted via SD or SPI. This
procedure is documented in Freescale Document Number AN3659 "Booting
from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
Processor Reference Manual" (section 4.5).
Signed-off-by: NIra W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The P3060QDS is a Freescale reference board for the six-core P3060 SOC.

P3060QDS Board Overview:
 Memory subsystem:
  - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
  - 128M Bytes NOR flash single-chip memory
  - 16M Bytes SPI flash
  - 8K Bytes AT24C64 I2C EEPROM for RCW
 Ethernet:
  - Eight Ethernet controllers (4x1G + 4x1G/2.5G)
  - Three VSC8641 PHYs on board (2xRGMII + 1xMII)
  - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
 PCIe: Two PCI Express 2.0 controllers/ports
 USB:  Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
 I2C:  Four I2C controllers
 UART: Supports two dUARTs up to 115200 bps for console
 RapidIO:  Two RapidIO, sRIO1 and sRIO2
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch adds the build support for the
omap5_evm board.
Signed-off-by: Nsricharan <r.sricharan@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Robert Schwebel <robert@schwebel.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

This contains support for the following components:
- DUART
- MMC
- Both FEC interfaces
- NAND
- I2C (RTC, EEPROM)
- SPI (FLASH)
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

add new configuration file da850_am18xxevm.h for AM18xx boards
which are based on da850 SOC. AM18xx has WINBOND spi flash which
is indicated in the config file. And make appropriate changes in
board.cfg for building.
Signed-off-by: NNagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

Alter the board.cfg to pass core module configuration flags
so we can make compile-time switches for different core
modules. These are already in use for some low-level code,
they just got lost in the conversion to the new build
system.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add ADP-AG101P into MAINTAINERS list.
Add ADP-AG101P into boards.cfg.
Signed-off-by: NMacpaul Lin <macpaul@andestech.com>

add new configuration file for dm6467T and appropraite changes
in boards.cfg. dm6467T is the new varaiant of dm6467 SOC which
supports 33 MHz reference clock where as dm6467 supports 27 MHz
reference clock.
Signed-off-by: NManjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

The new MPC8360EMDS board changes the oscillator to 33.33MHz
in order to support QE 500MHz since 2008.
Signed-off-by: NJerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>

Move the coldfire boards to boards.cfg. The config name
for the EB+MCF-EV123 boards are changed to EB-MCF-EV123
as the '+' cannot be recognized.
Signed-off-by: NJason Jin <Jason.jin@freescale.com>

Add support for the MATRIX VISION mvBlueLYNX-X, an OMAP3-based
intelligent camera.
Signed-off-by: NMichael Jones <michael.jones@matrix-vision.de>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

- DM368 SOC
- booting with spl not with UBL from TI
- before loading u-boot from NAND into RAM, test
  the RAM with the post memory test. If error
  is found, switch all LEDs on and halt system.
- SPI Flash
  Dataflash Typ: M25PE80
- Ethernet DM9161BI
- MMC
- USB
Signed-off-by: NHeiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

Add an optimized board configuration that only
supports boot from NAND.
Signed-off-by: NSanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

Add an optimized board configuration that only
supports boot from MMC/SD.
Signed-off-by: NSanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

The Xilinx FPGA must be reconfigured each time the unit
reboots. The FPGA is connected to the GPIO pin 39 from kirkwood.
This patch triggers this pin for km_kirkwood_pci targets.
Signed-off-by: NHolger Brunck <holger.brunck@keymile.com>
Signed-off-by: NValentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>

This adds basic board support for TT-01 based on
the Bluetechnix i.MX31 SOM. Currently only NOR-Flash
boot is implemented.
Signed-off-by: NHelmut Raiger <helmut.raiger@hale.at>
Acked-by: NStefano Babic <sbabic@denx.de>

The flea3 board is a custom board by CarMediaLab used
in automotive.
Network (FEC), NOR, NAND and SPI are supported.
Signed-off-by: NStefano Babic <sbabic@denx.de>

Add basic support for Calxeda Highbank platform. Only minimal support with
serial and SATA are included.
Signed-off-by: NJason Hobbs <jason.hobbs@calxeda.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>