The eSDHC reference clocks should be provided by speed.c in arch/.
And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to
select which clock to use. Because we can make the driver to select
the periperhal clock which is better (provides higher frequency)
automatically if its value is provided by speed.c.

This patch is to drop this option and make driver to select clock
automatically. Also fix peripheral clock calculation issue in
fsl_lsch2_speed.c/fsl_lsch3_speed.c.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

The SDHC clock divider value for LS1028A should be default 2,
not 1.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

The QorIQ eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
This patch is to add another global variable sdhc_per_clk for
periperhal clock, which provides higher frequency and is required
to be used for SD UHS and eMMC HS200/HS400 speed modes.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

The below patch added eSDHC periperhal clock code initially.
2d9ca2c7 mmc: fsl_esdhc: Add peripheral clock support

The purpose was to fix up device tree properties "peripheral-frequency"
so that linux could get the periperhal clock by it.
However the implementation on both u-boot and linux was only
for a Freescale SDK release. The linux part implementation had never
been upstreamed. These code should not have been exist on u-boot
mainline.

Let's remove the powerpc part changes but keep the changes in
fsl_esdhc driver. The changes in fsl_esdhc driver could be utilized
to support SD UHS and eMMC HS200/HS400 speed modes for current
Layerscape ARM platforms.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

The fdt fixup for properties "peripheral-frequency" and "adapter-type"
was once for a Freescale SDK release. The properties haven't been existed
in linux mainline. Drop these useless code.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Drop QorIQ eSDHC specific peripheral clock code.
Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com>

Pull request for UEFI sub-system for efi-2020-04-rc1-2

Bug fixes for the UEFI sub-system are provided:

* imply VIDEO_ANSI for correct cursor positioning and colors
* fix issues in the UEFI block device driver
* add missing documentation

-----------------------------------
- imx8:
	add capricorn giedi deneb boards
- imx6:
	fixed fow wandboard
- imx7: DM_ETHER for pico-imx7d
- fsl_esdhc_imx: add broken-cd property
- New SOC: IMXRT10xx

Travis:
	https://travis-ci.org/sbabic/u-boot-imx/builds/637126531

- Important bugfix for some Tegra platforms

UEFI programs like GRUB make change terminal colors which requires support
for ANSI escape sequences.

Let CONFIG_EFI_LOADER=y imply CONFIG_VIDEO_ANSI.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Use the correct printf codes for the debug output in efi_uc_start() and
efi_uc_stop().
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Use the correct protocol in efi_uc_stop() when detaching the driver from
the controller.

Change the block IO unit test for the block device driver to throw an error
instead of a todo if teardown fails.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

For automating testing we should be able to power off the test system.
The implementation of EFI_RESET_SHUTDOWN requires the do_poweroff()
function which is only available if CONFIG_CMD_POWEROFF=y.

Enable CONFIG_CMD_POWEROFF if PSCI reset is available.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Provide a sober description of how control can be returned by a UEFI
binary.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

Add the missing Sphinx documentation.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>

This commit adds board support for i.MXRT1050-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT105x processor family.

More information about this board can be found here:
https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK

The initial supported/tested devices include:
- Debug serial
- SD
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.IMXRT family basic support.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add compatible "fsl,imxrt-usdhc" to make mmc working on i.MXRT platforms
with CONFIG_DM_MMC=y.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Not all architectures(i.e. i.MXRT) support mxc_get_clock() and use DM_CLK
instead. So building could result in failure due to missing
mxc_get_clock().

Make if(CONFIG_IS_ENABLED(CLK)) an #if statement.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add SDRAM driver for i.MXRT SoCs.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also according to RM, the Receive RX FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08 as done
for i.MX8. It needs also to set baudrate the same way as i.MX8 does.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

This driver assumes that lpuart clock is already enabled before probing
but using DM only lpuart won't be automatically enabled so add
clk_enable() when probing if CONFIG_CLK is defined. If clock is not
found, because DM is not used, let's emit a warning and proceed, because
serial clock could also be already enabled by non DM code. If clock is
found but cna't be enabled then return with error.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add dtsi file for i.MXRT1050.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.MXRT1050 support, there are 5 GPIO banks.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.MXRT pinctrl driver.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add i.MXRT1050 clk driver support.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Implement set_rate() for pfd.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Add support for PLLV3 AV type.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

Add PLLV3_SYS support by adding set/get_rate() for PLLV3_SYS but keeping
generic enable()/disable(). Add a different driver because ops are
different respect to GENERIC/USB.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Add generic set_rate() support.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Add disable() support.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Before set_rate() pllv3 needs enable() to power the pll up.
Add enable() taking into account different power_bit and
different powerup_set, because some pll needs its power_bit to be
set or reset to be powered on.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

div_mask is different for GENERIC and USB pll, so set it according.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Better to register the 2 clock as 2 different drivers because they work
slightly differently depending on power_bit and powerup_set bits coming
on next patches.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: NLukasz Majewski <lukma@denx.de>

Since some driver requires this function add it as an empty stub
when DCACHE is OFF.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.

So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.
Signed-off-by: NGiulio Benetti <giulio.benetti@benettiengineering.com>

IPG clock description is missing for I2C0 and I2C2 busses,
add it. Otherwise we see -ENODATA error when trying to get
I2C clock for these busses.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Since commit d02be21d ("i2c: imx_lpi2c: add ipg clk") getting
I2C clocks doesn't work. Add I2C IPG clock IDs to related switch
statements to fix it.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: NPeng Fan <peng.fan@nxp.com>

imx6ul-14x14-evk does not have a GPIO dedicated for reading the card
detect pin on the eSDHC2 port. In such cases the "broken-cd" property
must be passed, otherwise the card cannot be detected.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

When no GPIO is used to read the card detect status the following
error is seen:

MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... MMC: no card present
*** Warning - No block device, using default environment

Fix it by handling the "broken-cd" property in the same way
that drivers/mmc/sdhci.c does, which considers that the SD card
is present when the "broken-cd" property is passed.

Tested on a imx6ul-evk board.
Signed-off-by: NFabio Estevam <festevam@gmail.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>