The board/altera/socfpga directory is not a generic SoCFPGA machine
anymore, but instead it represents the Altera SoCDK board. To make
matters more complicated, it represents both CycloneV and ArriaV
variant.

On the other hand, nowadays, the content of this board directory is
mostly comprised of QTS-generated header files, while all the generic
code is in arch/arm/mach-socfpga already.

Thus, this patch splits the board/altera/socfpga into a separate
board directory for ArriaV SoCDK and CycloneV SoCDK, so that each
can be populated with the correct QTS-generated header files for
that particular board.
Signed-off-by: NMarek Vasut <marex@denx.de>

The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
selected both a board and a CPU. This is not correct as these macros
are supposed to select only board.

All would be good, if QTS-generated header files didn't check for
these macros exactly to determine if the platform is Cyclone V or
Arria V. Thus, for the sake of compatibility with not well fleshed
out header file generator, this patch makes these two macros into
a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
previous stub config option.

The result is that compatibility with QTS is preserved and the new
CONFIG_TARGET_* select actual target boards.
Signed-off-by: NMarek Vasut <marex@denx.de>

Move the wrappers for QTS-generated files into platform directory
out of the board directory. The trick here is to add -I to CFLAGS
such that it points to the board directory in source tree and thus
the qts/ directory there is still reachable.
Signed-off-by: NMarek Vasut <marex@denx.de>

The GMAC which is enabled is purely board property, so do not enable
arbitrary GMAC in DT include files. Same goes for PHY mode, which is
again a board property. The CycloneV SoCDK does this correctly, but
SoCrates doesn't. This bug never manifested itself though, since all
the boards ever used the GMAC1 . This bug manifests itself only on
boards that utilise GMAC0.
Signed-off-by: NMarek Vasut <marex@denx.de>

The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node.
This makes aliases not very usable, so make everything into mmc0.
Moreover, zap the useless mmc alias while at this.
Signed-off-by: NMarek Vasut <marex@denx.de>

This code claims it needs to wait 7us, yet it uses get_timer() function
which operates with millisecond granularity. Use timer_get_us() instead,
which operates with microsecond granularity.
Signed-off-by: NMarek Vasut <marex@denx.de>

Based on observation, this udelay(20) was apparently too high and caused
subsequent failure to calibrate DDR when U-Boot was compiled with certain
toolchains. Lowering this delay fixed the problem.

Instead of permanently lowering the delay, calculate the correct delay
based on the original comment, that is, obtain EOSC1 frequency and use
it to calculate the precise delay.
Signed-off-by: NMarek Vasut <marex@denx.de>

Fix the following problem:
drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full':
drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be used uninitialized in this function [-Wmaybe-uninitialized]
  if (found_passing_read && found_failing_read)
                         ^
drivers/ddr/altera/sequencer.c:1803:26: note: 'found_failing_read' was declared here
  u32 found_passing_read, found_failing_read, initial_failing_dtap;
                          ^
Signed-off-by: NMarek Vasut <marex@denx.de>

This gem is really really rare, there was an actual float used in
the Altera DDR init code, which pulled in floating point ops from
the libgcc, just wow.

Since we don't support floating point operations the same way Linux
does not support them, replace this with an integer multiplication
and division combo. This removes some 2kiB of size from the SPL as
the floating point ops are no longer pulled in from libgcc.

This was detected by enabling CONFIG_USE_PRIVATE_LIBGCC=y , which
does not contain the floating point bits.
Signed-off-by: NMarek Vasut <marex@denx.de>

This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NHeiko Schocher <hs@denx.de>
Acked-by: NMarek Vasut <marex@denx.de>

This driver is not used only on exynos, but also on Altera SoCFPGA,
HiSilicon SoCs, RPi etc, so rename it accordingly to prevent confusion.
Signed-off-by: NMarek Vasut <marex@denx.de>

Add the Synopsys compatible string. This is used in SoCFPGA DT files.
Signed-off-by: NMarek Vasut <marex@denx.de>

populate _reset_ callback to the USB ethernet gadget since UDC core
expects every gadget driver to have the reset callback. This shouldn't
be needed once the ethernet gadget driver is adapted to use the
composite driver.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NLukasz Majewski <l.majewski@samsung.com>

xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have
the corresponding cleanup function in xhci_hcd_stop.

Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop().
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Acked-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NLukasz Majewski <l.majewski@samsung.com>

Ethernet gadget driver can be used both by both SPL and u-boot. Since
usb_eth_init() is the entry point for ethernet gadget driver, perform
board initialization there. Also perform the cleanup in usb_eth_halt.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Acked-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NLukasz Majewski <l.majewski@samsung.com>

This patch fixes a potential NULL pointer dereference arising on
non-present/non-initialized xHCI controllers and adds some error
handling to xHCI code
Signed-off-by: NSergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: NRadha Mohan Chintakuntla <rchintakuntla@cavium.com>

USB EHCI on SPEAr600 has not been tested for a while. The base controller
addresses are missing. This patch adds the defines to the header. And adds
the missing code.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Cc: Marek Vasut <marex@denx.de>

Add wait_for_bit to check reg bit status and replace unbounded
loops to check usb command status
Signed-off-by: NAdrian Alonso <aalonso@freescale.com>

Extend ehci-mx6 usb driver to support imx7d usb
Signed-off-by: NAdrian Alonso <aalonso@freescale.com>

Document target board specific functions

board_ehci_hcd_init - override usb phy mode
board_ehci_hcd_init - set usb vbus voltage
board_ehci_power - enables/disables usb vbus voltage
Signed-off-by: NAdrian Alonso <aalonso@freescale.com>

Cleanup read/write register access, use clr/set bits_le32
Signed-off-by: NAdrian Alonso <aalonso@freescale.com>

We have to set a MAC address to use network.
Otherwise, the tftpboot command fails with the following message:

  Gem.e000b000 Waiting for PHY auto negotiation to complete........ done
  *** ERROR: `ethaddr' not set

Since commit 92ac5208 ("net: Remove all references to
CONFIG_ETHADDR and friends"), we can not use CONFIG_ETHADDR.

The easiest way to set a MAC address is to enable
CONFIG_NET_RANDOM_ETHADDR.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

zynq-7000.dtsi include skeleton.dtsi which contains memory node with
base address and size zero. If you add memory@0 node to the platform DTS
in final DTB there are two memory nodes and U-Boot works with the first
one (with zeros) which end up in failing in dram_init because size is
zero.
Platform memory node should rewrite default memory node setup from
skeleton.dtsi that's why platfroms needs to also use memory as node name
instead of memory@0.
Reported-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

We have to set a MAC address to use network.
Otherwise, the tftpboot command fails with the following message:

  Gem.e000b000 Waiting for PHY auto negotiation to complete........ done
  *** ERROR: `ethaddr' not set

Since commit 92ac5208 ("net: Remove all references to
CONFIG_ETHADDR and friends"), we can not use CONFIG_ETHADDR.

The easiest way to set a MAC address is to enable
CONFIG_NET_RANDOM_ETHADDR.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Use embedded DTB to let users use u-boot instead of u-boot-dtb.bin.
And fix SPL to use this target.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Added usb dwc3 driver support for zynqmp
this also supports the DFU and LTHOR to download
the linux images on to RAM and cen be booted from
those linux images.
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

One disadvantage of commit a26cd049 (arch: Make board selection
choices optional) is that Kconfig could create such an insane
.config file that no board is selected.

Rip off the "optional" again in favor of ZC702 as the default
target.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Define checkboard() function for zynqMP
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable networking for EP108 by default.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable gem0 and setup phy addr for EP.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Based on the patch:
"armv8: caches: Added routine to set non cacheable region"
(sha1: dad17fd5)
it is necessary to add platform specific hook.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

Enable Secure IOU setup to enable U-Boot to run in EL3 without
setting from ATF.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

We have flipped CONFIG_SPL_DISABLE_OF_CONTROL.  We have cleansing
devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear
away the ugly logic in include/fdtdec.h:

 #ifdef CONFIG_OF_CONTROL
 # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL)
 #  define OF_CONTROL 0
 # else
 #  define OF_CONTROL 1
 # endif
 #else
 # define OF_CONTROL 0
 #endif

Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute.  It refers to
CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for
SPL.

Also, we no longer have to cancel CONFIG_OF_CONTROL in
include/config_uncmd_spl.h and scripts/Makefile.spl.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

As we discussed a couple of times, negative CONFIG options make our
life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ...
and here is another one.

Now, there are three boards enabling OF_CONTROL on SPL:
 - socfpga_arria5_defconfig
 - socfpga_cyclone5_defconfig
 - socfpga_socrates_defconfig

This commit adds CONFIG_SPL_OF_CONTROL for them and deletes
CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert
the logic.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

There is no case where defined(SPL_DISABLE_OF_CONTROL) is true.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

We do not want to compile the DM remove code for SPL.  Currently,
we undef it in include/config_uncmd_spl.h (for C files) and in
scripts/Makefile.uncmd_spl (for Makefiles).  This is really ugly.

This commit demonstrates how we can deprecate those two files.

Use $(SPL_) for the entry in the Makfile and CONFIG_IS_ENABLED()
in C files.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>