Those could be easily used on USB flash drives or on SD/MMC cards.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

There's no reason to keep data cache disabled in axs101
board any longer, enabling it.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

ARCompact cores are not supposed to be used in SMP designs
(this doesn't stop people from creation of heterogeneous chips,
for an example keep reading) so there's no point in
checking ARCNUM and halting somebody if we build for ARC700.

Moreover on AXS101 board we have ARC770 in the ASIC together with
other ARC cores and ARC770 happens to be the last node in JTAG chain
with ARCNUM = 4. And existing check halts the one and only core we
want keep running.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

Conflicts:
	include/configs/imx6qdl_icore_rqs.h
	include/configs/imx6ul_geam.h
	include/configs/imx6ul_isiot.h

This reverts commit ddb3ac3c.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops->read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The correct name is 'Celsius', so fix it accordingly.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>

These are only used in drivers/mis/i2c_eeprom.c
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>

- fix sparse warnings
- sync DT with Linux
- add new board support (LD11/LD20 global)

Add initial device tree support for LD20 Global board.
Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Add initial device tree support for LD11 Global board.
Signed-off-by: NKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Fix warnings reported by sparse:
 - ... was not declared. Should it be static?"
 - cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

According to rk3036 TRM, pll_con1[12] should be set to '1' for the pll
integer mode, while the '0' means the frac mode.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The maximum spl_size for rk3399 is the internal memory size minus
the size used in bootrom (which usually can get from SPL_TEXT_BASE).
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

The SPL_MAX_SIZE is the internal memory size minux the space
used by bootrom.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

This function is unused, remove.  Reported by clang-3.8.

Fixes: a1c29d4b ("rockchip: mkimage: set init_boot_size to avoid ...")
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

since commit: f8b7fff1 "serial: atmel_usart: Add clk support"
corvus board comes not up anymore. Fix it.
Signed-off-by: NHeiko Schocher <hs@denx.de>

Adding myself to MAINTAINERS and git-mailrc for the rockchip
sub-architecture.
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: NSimon Glass <sjg@chromium.org>

fix menutext for the options SPL_DM_SERIAL and TPL_DM_SERIAL.
Both have the same text as DM_SERIAL, which is
confusing.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NStefan Roese <sr@denx.de>

for debugging it is handy to know the fdt_blob
address. So print it in bdinfo.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>

Otherwise the loaded image would miss the efi_runtime sections, and fall
over hard when grub (for example) tried to call runtime services located
in this section.
Signed-off-by: NRob Clark <robdclark@gmail.com>

commit dfe64e2c
    Author: Sergey Lapin <slapin@ossfans.org>
    Date:   Mon Jan 14 03:46:50 2013 +0000

        mtd: resync with Linux-3.7.1

modified onenand_block_markbad to call mtd_block_markbad,
but as _block_markbad function pointer used by mtd_block_markbad
to do actual job is by default pointing back to
onenand_block_markbad there is no way this function ever
finishes its job.
Fix it by changing function body according current (4.12-rc6)
linux implementation.
Tested on IGEPv2 board with Muxed OneNAND(DDP) 512MB containing
several unerasable blocks this function marked bad.
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>

Current implementation is unable to access second half of
DDP OneNAND flash (reads first half mirrored). Use block
and bufferram address calculations from onenand_base to
fix this.
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>

Do not call onenand_spl_get_geometry() for each block read.
Signed-off-by: NLadislav Michl <ladis@linux-mips.org>

Define a default number of 1 for mmc max device if board config didn't
specify one.
Signed-off-by: NEmmanuel Vadot <manu@bidouilliste.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The variables gpll_init_cfg and apll_init_cfg are unused in this file,
remove them.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The variable syndrome_codes is only used when DEBUG is define, add #if
guards around it in the same style as the rest of the file.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NStefan Roese <sr@denx.de>

On the controlcenterd_36BIT_SDCARD config we get a warning about
prg_stage1_prepare being unused.  Move the declaration closer to usage
and hide under the existing #if tests.

Cc: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: NTom Rini <trini@konsulko.com>

Now that we can specify DT nodes that can be used in spl, mark
all necessary nodes as u-boot,dm-spl.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

Now that we can specify DT nodes that can be used in spl, mark
all necessary nodes as u-boot,dm-spl.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

It has been observed that between PG1.0 and PG2.0/2.1 depending on
which device we boot from, we may see a different value here than is
documented in the TRM.  Update the values for NAND and MMC1 based on
real life usage on each revision.
Signed-off-by: NTom Rini <trini@konsulko.com>

Signed-off-by: NSam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: NTom Rini <trini@konsulko.com>

In armada_37xx_gpiochip_register, the return value of fdtdec_get_bool
should be true when gpio-controller is found; current codes makes a
wrong inverse return value judgement, this patch fixes it.
Signed-off-by: NKen Ma <make@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Reviewed-by: NStefan Roese <sr@denx.de>
Signed-off-by: NStefan Roese <sr@denx.de>

If north bridge selection register bit1 is clear, pins [10:8] are for
SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
and CTSn, so bit1 should be added to uart2 group and it must be set
for both "gpio" and "uart" functions of uart2 group.
Signed-off-by: NKen Ma <make@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Reviewed-by: NStefan Roese <sr@denx.de>
Signed-off-by: NStefan Roese <sr@denx.de>

As all x86 boards have been switched over to use DM USB, remove
CONFIG_USB_MAX_CONTROLLER_COUNT which is not used by DM USB.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NStefan Roese <sr@denx.de>
Tested-by: NStefan Roese <sr@denx.de>

GPIO bank E pin 8 & 9 are used to control the on-board two USB ports
VBUS on/off. Let's configure them in the misc_init_r().
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NStefan Roese <sr@denx.de>
Tested-by: NStefan Roese <sr@denx.de>