- 28 1月, 2018 4 次提交
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由 Marek Vasut 提交于
Use the common RCAR_GEN2 config option instead of enumerating each SoC and having a lengthy ifdef clause. No functional change. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Cosmetic fix, make ravb_start() static. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
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由 Marek Vasut 提交于
Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs. The PCIe on Gen2 is used both to connect external PCIe peripherals as well as access the on-SoC USB EHCI controller. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
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由 Marek Vasut 提交于
Add DT compatible string for RCar Gen2. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- 25 1月, 2018 23 次提交
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由 Marek Vasut 提交于
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import clock tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import clock tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import clock tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import clock tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Add common clock code for Renesas RCar Gen2 platforms. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Add macros for the DIV6P1 clock type, which is used on Gen2 and optionally also on Gen3. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Pull code which is common for RCar Gen2 and RCar Gen3 into separate source file. No functional change. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Add Kconfig entries for each SoC clock table, so they can be compiled in or out at build time. This can reduce the size of the binary if desired. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
The Gen2 requires setting RMSTPCR before booting, while on Gen3 this is thus far always zero. Split the tables so the RMSTPCR can be set too. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Extract the macros specific to Gen3 clock into a separate header. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Not all SoCs have the same PLL configuration options, so make those PLL configuraion tables per-SoC. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Not all drivers use the same IDs, so make those IDs per-driver. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Split the massive driver into smaller per-SoC drivers and pull the common code into a separate file. This would allow configuring out unnecessary clock drivers once the Kconfig changes are in and also allow adding more clock tables easily. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Chris Brandt 提交于
Add support for RZ/A1 series SoCs. Signed-off-by: NChris Brandt <chris.brandt@renesas.com>
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由 Marek Vasut 提交于
Use the common RCAR_GEN2 config option instead of enumerating each SoC and having a lengthy ifdef clause. No functional change. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Replace fdtdec_get_addr() with devfdt_get_addr() as the later one is the current recommended practice. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Convert these configuration options to Kconfig, update board defconfigs and drop them from whitelist. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Pull out u-boot extras into dtsi files to make synchronization of DTS from Linux kernel as easy as a simple copy. All the U-Boot extras are now in *-u-boot.dts* files instead. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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由 Marek Vasut 提交于
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.14, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . This includes both M3 and H3 ULCB and Salvator-X boards. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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- 24 1月, 2018 13 次提交
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由 Ashish Kumar 提交于
Add macro QIXIS_LBMAP_EMMC, QIXIS_LBMAP_IFC, QIXIS_RCW_SRC_IFC, QIXIS_RCW_SRC_EMMC to enable IFC and eMMC as boot sources for qixis commands. Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> [YS: Modify subject and add commit message] Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Ashish Kumar 提交于
Currently only SD, NAND can be secondary boot sources controlled by FPGA/CPLD via qixis commands. For SoC like LS1088 IFC-NOR can be secondary boot source, while QSPI-NOR is the primary. Add options in qixis to switch to other boot sources including ifc and emmc. Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Breno Lima 提交于
The hash command function were not flushing the dcache before passing data to CAAM/DMA and not invalidating the dcache when getting data back. Due the data cache incoherency, HW accelerated hash commands used to fail with CAAM errors like "Invalid KEY Command". Check if pbuf and pout buffers are properly aligned to the cache line size and flush/invalidate the memory regions to address this issue. This solution is based in a previous work from Clemens Gruber in commit 598e9dcc ("crypto/fsl: fix BLOB encapsulation and decapsulation") Reported-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NBreno Lima <breno.lima@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Pankaj Bansal 提交于
The current GPL only licensing on the device trees makes it very impractical for other software components licensed under another license. To make it easier to reuse them, re-license the the device trees for Freescale (now NXP) SoCs and boards under GPLv2+/X11 dual license. Same trend is followed in linux. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: NPankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Rajesh Bhagat 提交于
Enables and compiles VID specific functions for SPL. Signed-off-by: NPankit Garg <pankit.garg@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Rajesh Bhagat 提交于
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems. It reads the fusesr register and changes the VDD accordingly by adjusting the voltage via LTC3882 regulator. This patch also takes care of the special case of 0.9V VDD is present in fusesr register. In that case,it also changes the SERDES voltage by disabling the SERDES, changing the SVDD and then re-enabling SERDES. Signed-off-by: NRaghav Dogra <raghav.dogra@nxp.com> Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NAmrita Kumari <amrita.kumari@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Rajesh Bhagat 提交于
Adds a VID specific API in init_sequence_f and spl code flow namely init_func_vid which is required to adjust core voltage. VID specific code is required in spl, hence moving flag CONFIG_VID out of spl flags. Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Rajesh Bhagat 提交于
When VID feature is supported, check the contents of fuse register and configure DDR operate at 0.9v. Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Rajesh Bhagat 提交于
Sets DDR configuration parameter cdr1 before all other settings to support case 0.9v VDD is enabled for some SoCs Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Rajesh Bhagat 提交于
Restructures common driver to support LTC3882 voltage regulator chip. Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Rajesh Bhagat 提交于
Adds below LTC3882 voltage regulator config: CONFIG_VOL_MONITOR_LTC3882_READ CONFIG_VOL_MONITOR_LTC3882_SET Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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由 Rajesh Bhagat 提交于
Moves IR chip (IR36021) specific code in flag to resolve compilation issue where it is not present. For example, LS1088A is having a new LTC3882 voltage chip. Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NRajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: NYork Sun <york.sun@nxp.com>
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