- 09 7月, 2019 6 次提交
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由 Chuanhua Han 提交于
The previous pcf2127 RTC chip could not read and set the correct time. When reading the data of internal registers, the read address was the value of register plus 1. This is because this chip requires the host to send a stop signal after setting the register address and before reading the register data. This patch sets the register address using dm_i2c_write and reads the register data using the original dm_i2c_xfer in order to generate a stop signal after the register address is set, and fixes the bug of the original read and write time. Signed-off-by: NBiwen Li <biwen.li@nxp.com> Signed-off-by: NChuanhua Han <chuanhua.han@nxp.com> Reviewed-by: NLukasz Majewski <lukma@denx.de> Reviewed-by: NHeiko Schocher <hs@denx.de>
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由 Melin Tomas 提交于
Prior to starting a new transfer, conditionally wait for bus to not be busy. Reinitialise controller as otherwise operation is not stable. For reference, see linux kernel commit 9656eeebf3f1 ("i2c: Revert i2c: xiic: Do not reset controller before every transfer") hs: Fixed DOS line endings added missing '\n' Fixed git commit description style Signed-off-by: NTomas Melin <tomas.melin@vaisala.com>
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由 Melin Tomas 提交于
Comparison should be against the actual message length, not loop index. len is used for stopping while loop, pos is position in message. stop should be sent when entire message is sent, not when len and pos meet. hs: fixed DOS line endings Signed-off-by: NTomas Melin <tomas.melin@vaisala.com>
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由 Ley Foon Tan 提交于
Get clock rate from clock DM if CONFIG_CLK is enabled. Otherwise, uses IC_CLK define. Signed-off-by: NLey Foon Tan <ley.foon.tan@intel.com> Acked-by: NMarek Vasut <marex@denx.de>
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由 Jun Chen 提交于
Before calling __dw_i2c_set_bus_speed(), the I2C could already be set as ether enable or disable, we should restore the original setting instead of enable i2c anyway. This patch fix a bug happened in init function: __dw_i2c_init(){ /* Disable i2c */ ... __dw_i2c_set_bus_speed(i2c_base, NULL, speed); writel(slaveaddr, &i2c_base->ic_sar); /* Enable i2c */ } In this case, enable i2c inside __dw_i2c_set_bus_speed() function will cause ic_sar write fail. Signed-off-by: NJun Chen <ptchentw@gmail.com>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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- 08 7月, 2019 5 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-mips由 Tom Rini 提交于
- mtmips: network stability fixes for gardena-smart-gateway
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由 Weijie Gao 提交于
The watchdog of mediatek chips is enabled by bootrom before u-boot is running. Previously we choose to enable the wdt driver only to disable the watchdog hardware. Now wdt service is enabled by default. The function arch_misc_init which is only used to disable wdt is no longer needed. Reviewed-by: NStefan Roese <sr@denx.de> Reviewed-by: NRyder Lee <ryder.lee@mediatek.com> Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com>
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由 Weijie Gao 提交于
The initr_watchdog is currently placed before initr_serial. The initr_watchdog calls printf and printf finally calls ops->putc of a serial driver. However, gd->cur_serial_dev points to a udevice allocated in board_f. The gd->cur_serial_dev->driver->ops->putc points the the code region before relocation. Some serial drivers call WATCHDOG_RESET() in ops->putc. When DM is enabled for watchdog, watchdog_reset() is called. watchdog_reset() calls get_timer to get current timer. On some platforms the timer driver is also a DM driver. initr_watchdog is placed right after initr_dm, which means the timer driver hasn't been initialized. So dm_timer_init() is called. To create a new udevice, calloc is called. However start from ops->putc, u-boot execution flow is redirected into the memory region before relocation (board_f). In board_f, dlmalloc hasn't been initialized. The call to calloc will fail, and this will cause DM to print out an error message, and it will call printf again, causing recursive error outputs. This patch places initr_watchdog after initr_serial to solve this issue. Cc: Stefan Roese <sr@denx.de> Reviewed-by: NRyder Lee <ryder.lee@mediatek.com> Signed-off-by: NWeijie Gao <weijie.gao@mediatek.com> Reviewed-by: NStefan Roese <sr@denx.de> Tested-by: NFrank Wunderlich <frank-w@public-files.de> Tested-by: NSuniel Mahesh <sunil.m@techveda.org>
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- 07 7月, 2019 4 次提交
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由 Heinrich Schuchardt 提交于
One of the SD-CARD slots on the Wandboard Quad B1 is MMC 2. Enable it as a boot device. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: NFabio Estevam <festevam@gmail.com>
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由 Marc Dietrich 提交于
set_pwm() will always fail with -ENOSYS if pwm_ops set_invert() is not implemented, leaving the backlight dark. Fix this by returning no error if set_invert() is not implemented and no polarity change is requested. Fixes: 57e77754 ("video: backlight: Parse PWM polarity cell") Signed-off-by: NMarc Dietrich <marvin24@gmx.de>
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- 06 7月, 2019 1 次提交
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https://github.com/mbgg/u-boot由 Tom Rini 提交于
- fix complation error for CONFIG_USB - update RPi3 DTBs to v5.1-rc6 state - add defconfig for RPi3 B+ - Fix BCM2835_MBOX_TAG_TEST_PIXEL_ORDER define
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- 05 7月, 2019 6 次提交
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由 Stefan Roese 提交于
With commit 06985289 ("watchdog: Implement generic watchdog_reset() version") the init sequence has changed in arch_misc_init(), resulting in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena). When this happens, the first (or sometimes later ones as well) TFTP command hangs and does not complete correctly. This leads to the assumption that the d-cache is not in a clean state once the ethernet driver is called (d-cache is used here for the buffers). The old work- around with the cache flush somehow does not work any more now with the new code change. Unfortunately adding CONFIG_SYS_MALLOC_CLEAR_ON_INIT also did not fix this issue. With v2019.07-rc3 it shows again. The time of accessing the data seems to be very important here. It needs to be "very late" in the boot process. Testing has shown, that copying a 64KiB area in DDR at a very late bootup time, directly before calling into the prompt, fixes this issue. Flushing of the complete d-cache does not seem to necessary, as this copy alone seems to fix this problem. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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由 Jean-Jacques Hiblot 提交于
dwc3-generic has been broken since MISC uclass has been modified to scan DT sub-nodes after bind. Fixing it by a using the no-op uclass. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
This uclass is intended for devices that do not need any features from the uclass, including binding children. This will typically be used by devices that are used to bind child devices but do not use dm_scan_fdt_dev() to do it. That is for example the case of several USB wrappers that have 2 child devices (1 for device and 1 for host) but bind only one at a any given time. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jean-Jacques Hiblot 提交于
There is simply no reason to do that here. Signed-off-by: NJean-Jacques Hiblot <jjhiblot@ti.com>
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由 Marek Vasut 提交于
The EHCI iMX6 driver is only partly converted to DT probing and still uses a tremendous amount of hard-coded addresses. Worse, the driver uses hard-coded SoC-model-specific base addresses, which are derived from values protected by SoC-specific macros, hence the driver is also compiled for a specific SoC model. Even worse, the driver depends on specific sequential indexing of the controllers, from which it derives offsets in the PHY and ANATOP register sets. However, when the driver is probed from DT, the indexing is not correct. In fact, each controller has index 0. This patch derives the index for DT probing case from the controller base addresses, which is not the way this should be done, however it is the least intrusive approach, favorable this close to release. The necessary steps to convert this driver fully to DT probing are described inside the patch, however this should be done in the next release and depends on iMX clock driver patches. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Abel Vesa <abel.vesa@nxp.com> Cc: Adam Ford <aford173@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Vagrant Cascadian <vagrant@debian.org>
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由 Andy Yan 提交于
Commit b238e4b0 ("rockchip: Cleanup of make_fit_atf.py.") set firmware = "atf_1"; loadables = "uboot","atf_1","atf_2"; Actually it should be: firmware = "atf_1"; loadables = "uboot","atf_2","atf_3"; Signed-off-by: NAndy Yan <andy.yan@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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- 04 7月, 2019 9 次提交
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由 Neil Armstrong 提交于
Add missing mailing-list to the amlogic boards MAINTAINERS file. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx由 Tom Rini 提交于
Fixes for 2019.07 ----------------- - Wandboard
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由 Fabio Estevam 提交于
After the conversion to DM the U-Boot proper binary name is 'u-boot-dtb.img', so adjust it accordingly. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Fabio Estevam 提交于
After the transition to DM, only the mx6dl/solo wandboard is supported. Add FIT image support so that all the wandboard variants can be supported, like it was prior to the DM conversion. Successfully booted Linux on mx6q/solo/qp wandboards. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Fabio Estevam 提交于
Add a mmc0 alias so that U-Boot proper can associate mmc0 with the boot SD card. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Fabio Estevam 提交于
Import wandboard devicetree files so that the mx6q and mx6qp variants can be properly supported. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Fabio Estevam 提交于
Udate the wandboard devicetree files with the ones from kernel 5.1.9. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Fabio Estevam 提交于
Place dtbs under SoC level rather than board level. imx6q-novena.dtb and imx6dl-wandboard-revb1.dtb were placed under the board config option, so move them to SoC level. This also aligns with the kernel dts Makefile format. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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由 Fabio Estevam 提交于
Keep dtb entries sorted to help adding new dtbs in an organized form. Signed-off-by: NFabio Estevam <festevam@gmail.com>
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- 02 7月, 2019 9 次提交
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip由 Tom Rini 提交于
- fix for atf bl31_image_info pointer - fix for rockpro64 vdd_log init - fix for tinker-rk3288 SPL size too big
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由 Kever Yang 提交于
All the config for TPL has been update, we can enable the TPL. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
The raw u-boot.bin for tinker board has been about 450KB without debug option, and 550KB with all debug on, and the default value is 200KB, which is not enough for run raw u-boot.bin. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
We need to update TEXT BASE for TPL/SPL/U-Boot; SPL no need relocate STACK after enable TPL, so remove it; Don't enable pinctrl names so that SPL can get pinctrl dts; Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
rockchip pinctrl driver has update to use dts, so we need to add the pinctrl config in SPL for sdmmc. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
Migrate all the "u-boot,dm-pre-reloc" tag from rk3288-tinker.dts into rk3288-tinker-u-boot.dtsi. When both board level and soc level '-u-boot.dtsi' files exist, we need to include the soc level 'rk3288-u-boot.dtsi' manually. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
Move all the tag "u-boot,dm-pre-reloc" from rk3288.dtsi into rk3288-u-boot.dtsi. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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由 Kever Yang 提交于
TPL is at SRAM while other stage is at SDRAM, so it needs separate STACK. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Kever Yang 提交于
More boards other than vyasa needs TPL, so enable the TPL configs at chip level instead of board level. Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
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