- 16 8月, 2021 14 次提交
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由 Alexandru Gagniuc 提交于
The STM32MP ROM provides several service. One of them is the ability to verify ecdsa256 signatures. Hook the ROM API into the ECDSA uclass. Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
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由 Alexandru Gagniuc 提交于
Implement the crypto_algo .verify() function for ecdsa256. Because it backends on UCLASS_ECDSA, this change is focused on parsing the keys from devicetree and passing this information to the specific UCLASS driver. Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
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由 Alexandru Gagniuc 提交于
Define a UCLASS API for verifying ECDSA signatures. Unlike UCLASS_MOD_EXP, which focuses strictly on modular exponentiation, the ECDSA class focuses on verification. This is done so that it better aligns with mach-specific implementations, such as stm32mp. Signed-off-by: NAlexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: NPatrick Delaunay <patrick.delaunay@foss.st.com>
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由 Marek Vasut 提交于
The SPI NOR is a bit further away from the SoC on DHCOR than on DHCOM, which causes additional signal delay. At 108 MHz, this delay triggers a sporadic issue where the first bit of RX data is not received by the QSPI controller. There are two options of addressing this problem, either by using the DLYB block to compensate the extra delay, or by reducing the QSPI bus clock frequency. The former requires calibration and that is overly complex for SPL, so opt for the second option. This incurs 20ms delay during boot, when SPL loads U-Boot to DRAM. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Marek Vasut 提交于
The DHSOM SPI NOR is using 4k erase blocks, make use of it and define the default environment sector size to 4k. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
Device tree alignment with Linux kernel v5.14-rc3 - ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15 - ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151 - ARM: dts: stm32: add a new DCMI pins group on stm32mp15 - ARM: dts: stm32: fix ltdc pinctrl on microdev2.0-of7 Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
The function board_get_usable_ram_top can be called after relocation with total_size = 0 to get the uppermost pointer that is valid to access in U-Boot. When total_size = 0, the reserved memory should be not take in account with lmb library and 'gd->ram_base + gd->ram_size' can be used. It is the case today in lib/efi_loader/efi_memory.c:efi_add_known_memory() and this patch avoids that the reserved memory for OP-TEE is not part of the EFI available memory regions. Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
The MTD tee partitions used to save the OP-TEE binary are needed when TF-A doesn't use the FIP container to load binaries. This patch puts under CONFIG_STM32MP15x_STM32IMAGE flag the associated code in U-Boot binary and prepare the code cleanup when CONFIG_STM32MP15x_STM32IMAGE support will be removed after TF-A migration to FIP support. Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
TF-A for STM32MP15 now supports the FIP: it is a packaging format which includes the secure monitor, u-boot-nodtb.bin and u-boot.dtb This FIP file is loaded by FSBL = TF-A BL2. This patch updates the board documentation to use this FIP file and no more u-boot.stm32 (with STM32 image header) which is no more generated. Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
Add TF-A FIP support for trusted boot on STM32MP15x, when STM32MP15x_STM32IMAGE is not activated. With FIP support the SSBL partition is named "fip" and its size is 4MB, so the ENV partition name in device tree (for SD card or eMMC) or offset in defconfig (CONFIG_ENV_OFFSET / CONFIG_ENV_OFFSET_REDUND) need to be modified. With FIP the TEE MTD partitions are removed because the OP-TEE binray are included in the FIP containers. Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
With FIP support in TF-A (when CONFIG_STM32MP15x_STM32IMAGE is not activated), the DT nodes needed by OP-TEE are added by OP-TEE firmware in U-Boot device tree, present in FIP. These nodes are only required in trusted boot, when TF-A load the file u-boot.stm32, including the U-Boot device tree with STM32IMAGE header, in this case OP-TEE can't update the U-Boot device tree. Moreover in trusted boot mode with FIP, as the OP-TEE nodes are present in U-Boot device tree only when needed the function stm32_fdt_disable_optee can be removed. Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
By default for trusted boot with TF-A, U-Boot (u-boot-nodtb) is located in FIP container with its device tree and with the secure monitor (provided by TF-A or OP-TEE). The FIP file is loaded by TF-A BL2 and each components is extracted at the final location. This patch add CONFIG_STM32MP15x_STM32IMAGE to request the STM32 image generation for SOC STM32MP15x when FIP container is not used (u-boot.stm32 is loaded by TF-A as done previously to keep the backward compatibility). Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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由 Patrick Delaunay 提交于
Add the support of the BSEC clock used by the STM32MP misc driver since the commit 622c956c ("stm32mp: bsec: manage clock when present in device tree") even if this clock is not yet defined in kernel device tree stm32mp151.dtsi. This patch avoids issue for basic boot when this secure clock are not provided by secure world with SCMI. Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: NPatrice Chotard <patrice.chotard@foss.st.com>
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https://source.denx.de/u-boot/custodians/u-boot-efi由 Tom Rini 提交于
Pull request for efi-2021-10-rc2-2 Documentation: * Require Sphinx >= 2.4.4 for 'make htmldocs' * Move devicetree documentation to restructured text and update it * Document stm32mp1 devicetree bindings UEFI * Extend measurement to UEFI variables and ExitBootServices() * Support Uri() node in devicetree to text protocol * Add Linux magic token to RISC-V EFI test binaries
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- 15 8月, 2021 13 次提交
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由 Masahisa Kojima 提交于
Refactor efi_append_scrtm_version() to use common function for adding eventlog and extending PCR. Signed-off-by: NMasahisa Kojima <masahisa.kojima@linaro.org>
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由 Masahisa Kojima 提交于
TCG PC Client PFP spec requires to measure "Exit Boot Services Invocation" if ExitBootServices() is invoked. Depending upon the return code from the ExitBootServices() call, "Exit Boot Services Returned with Success" or "Exit Boot Services Returned with Failure" is also measured. Signed-off-by: NMasahisa Kojima <masahisa.kojima@linaro.org> Swap two ifs in efi_exit_boot_services(). efi_tcg2_notify_exit_boot_services must have EFIAPI signature. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Masahisa Kojima 提交于
TCG PC Client PFP spec requires to measure "Boot####" and "BootOrder" variables, EV_SEPARATOR event prior to the Ready to Boot invocation. Since u-boot does not implement Ready to Boot event, these measurements are performed when efi_start_image() is called. TCG spec also requires to measure "Calling EFI Application from Boot Option" for each boot attempt, and "Returning from EFI Application from Boot Option" if a boot device returns control back to the Boot Manager. Signed-off-by: NMasahisa Kojima <masahisa.kojima@linaro.org>
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由 Masahisa Kojima 提交于
TCG PC Client PFP spec requires to measure the secure boot policy before validating the UEFI image. This commit adds the secure boot variable measurement of "SecureBoot", "PK", "KEK", "db", "dbx", "dbt", and "dbr". Note that this implementation assumes that secure boot variables are pre-configured and not be set/updated in runtime. Signed-off-by: NMasahisa Kojima <masahisa.kojima@linaro.org>
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由 Heinrich Schuchardt 提交于
Add the Linux magic to the EFI file header to allow running our test programs with GRUB's linux command. MajorImageVersion = 1 indicates a kernel that can consume the EFI_LOAD_FILE2_PROTOCOL. This allows to dump the GRUB provided intird with our initrddump.efi tool. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
iPXE used Uri() device path nodes. So we should support them in the device path to text protocol. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Patrick Delaunay 提交于
With device tree binding migration to yaml it is difficult to synchronize the binding from Linux kernel to U-Boot. Instead of maintaining the same dt bindings, this patch adds in the U-Boot documentation the path to the device tree bindings in Linux kernel for STMicroelectronics devices, when they are used without modification. Signed-off-by: NPatrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: NPatrice Chotard <patrice.chotard@foss.st.com> Add links for referenced text files. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Simon Glass 提交于
This question comes up every now and then with people coming from Linux. Add some notes about it so we can point to it in the mailing list. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Simon Glass 提交于
This file is about 10 years old and the updates have not covered everything that has changed, particularly in the last few years. Update the information and add mention of the u-boot.dtsi files. Signed-off-by: NSimon Glass <sjg@chromium.org> Fix typos. Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Simon Glass 提交于
Move this to rST format, largely unchanged to start with. Add an index for this topic, as well as an empty intro. Note this patch does not include updates! Is it just a conversion to the new format. See the next patch. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NHeinrich Schuchart <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Adjust the Latex formatting to match Linux v5.13.1: * add Latex margins * reformat the code in doc/conf.py to match Linux Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
Require Sphinx 2.44 to build the documentation. Remove all code related to earlier versions. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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由 Heinrich Schuchardt 提交于
tools/Makefile uses pkg-config. Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
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- 13 8月, 2021 4 次提交
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https://source.denx.de/u-boot/custodians/u-boot-x86由 Tom Rini 提交于
- Enable SeaBIOS support for Crown Bay - Update SeaBIOS build instructions in the x86 doc - Enable CONFIG_SPI_FLASH_SMART_HWCAPS for Crown Bay
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由 Bin Meng 提交于
Now that the spi-nor fix has been made in u-boot/master via: commit 87e7219f ("mtd: spi-nor: Respect flash's hwcaps in spi_nor_adjust_hwcaps()") enable CONFIG_SPI_FLASH_SMART_HWCAPS on Intel Crown Bay again. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Update SeaBIOS build instructions using exact command that involves "make olddefconfig", and mention SeaBIOS release 1.14.0 has been used for testing. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Enable SeaBIOS support for any kernel that requires legacy BIOS services. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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- 12 8月, 2021 9 次提交
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https://source.denx.de/u-boot/custodians/u-boot-rockchip由 Tom Rini 提交于
- Add Rockchip SFC driver support; - DTS sync from kernel; - emmc hs400 support for rk3399; - Fix for spinore bootdevice and MMC boot order;
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由 Jon Lin 提交于
Make px30 SFC clock configurable Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NJagan Teki <jagan@amarulasolutions.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an XT25F128B SPI NOR flash chip. This adds support for both. Note that while both the controller and chip support quad mode, only two lines are connected to the chip. Changing the pinctrl to bus2 and setting tx and rx lines to 2 for this reason. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately this chip uses a continuation code which I cannot seem to parse, so there are possibly going to be collisions with chips that use the same manufacturer/ID. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
Add the serial flash controller to the devicetree for the PX30. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
This patch adds support for setting the correct pin configuration for the Rockchip Serial Flash Controller found on the PX30. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Chris Morgan 提交于
This patch adds support for the Rockchip serial flash controller found on the PX30 SoC. It should work for versions 3-5 of the SFC IP, however I am only able to test it on v3. This is adapted from the WIP SPI-MEM driver for the SFC on mainline Linux. Note that the main difference between this and earlier versions of the driver is that this one does not support DMA. In testing the performance difference (performing a dual mode read on a 128Mb chip) is negligible. DMA, if used, must also be disabled in SPL mode when using A-TF anyway. Signed-off-by: NChris Morgan <macromorgan@hotmail.com> Signed-off-by: NJon Lin <jon.lin@rock-chips.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Johan Gunnarsson 提交于
Currently there are a few arm32 rockchip board configs that don't generate u-boot-rockchip.bin when running make because CONFIG_BINMAN is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64. Example builds that don't generate u-boot-rockchip.bin without this patch: export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make kylin-rk3036_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make rock_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make tinker-rk3288_defconfig make Signed-off-by: NJohan Gunnarsson <johan.gunnarsson@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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由 Peter Robinson 提交于
Sync the rk3368 DTs and associated bits from 5.14-rc1. Signed-off-by: NPeter Robinson <pbrobinson@gmail.com> Reviewed-by: NKever Yang <kever.yang@rock-chips.com>
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