- 23 2月, 2015 1 次提交
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由 Otavio Salvador 提交于
Some boards cannot do voltage negotiation but need to set the VSELECT bit forcely to ensure it to work at 1.8V. This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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- 09 9月, 2014 1 次提交
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由 Wang Huan 提交于
For LS102xA, the processor is in little-endian mode, while esdhc IP is in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE are added. So accessing ESDHC registers can be determined by ESDHC IP's endian mode. Signed-off-by: NAlison Wang <alison.wang@freescale.com>
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