- 07 12月, 2011 40 次提交
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由 Tom Rini 提交于
Add an SPL_BOARD_INIT hook and for OMAP3 have it turn on i2c. OMAP4 doesn't need i2c enabled in SPL. Enable SPL_BOARD_INIT on devkit8000. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
The only change of note is that we move from 0x80008000 to 0x80100000 for CONFIG_SYS_TEXT_BASE Cc: Nagendra T S <nagendra@mistralsolutions.com> Tested-by: NKoen Kooi <k-kooi@ti.com> Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
The only change of note is that we move from 0x80008000 to 0x80100000 for CONFIG_SYS_TEXT_BASE Cc: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>. This also changes CONFIG_SYS_TEXT_BASE to 0x80100000. Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
This introduces 200MHz Micron parts timing information based on x-loader to <asm/arch-omap3/mem.h> and Numonyx MCFG calculation. The memory init logic is also based on what x-loader does in these cases. Note that while previously u-boot would be flashed in with SW ECC in this case it now must be flashed with HW ECC. We also change CONFIG_SYS_TEXT_BASE to 0x80100000. Cc: Dirk Behme <dirk.behme@gmail.com> Beagleboard rev C5, xM rev A: Tested-by: NTom Rini <trini@ti.com> Beagleboard xM rev C: Tested-by: NMatt Ranostay <mranostay@gmail.com> Beagleboard rev B7, C2, xM rev B: Tested-by: NMatt Porter <mporter@ti.com> Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
A number of boards are populated with a PoP chip for both DDR and NAND memory. Other boards may simply use this as an easy way to identify board revs. So we provide a function that can be called early to reset the NAND chip and return the result of NAND_CMD_READID. All of this code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND. Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
This changes to making the board be responsible for providing the memory initialization timings in SPL and converts the devkit8000 to this framework. In SPL we try and initialize both CS0 and CS1. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
This adds the optimal SDRC autorefresh control register values for 100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this to provide the default 165MHz value. Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
This adds an MCFG macro to calculate the correct value, similar to the ACTIMA/ACTIMB macros and adds a comment that all of the potential values here are documented in the TRM. Then we convert the Micron value to use this macro. Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
This function doesn't exist for omap3 Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
It's possible to need to call this function on the same banks multiple times so we want to be sure that 'pos A' is cleared out again at the end. Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
Since we go through the sequence to setup the SDRC timings more than once, break this logic out into its own function and have that function call mem_ok() to make sure the memory is usable. Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
We update the comment in make_cs1_contiguous() to be a little bit more clear (it's been copy/pasted from other silicons) and then explain in dram_init() why we need to always try this. Note that in the previous behavior we were always calling this on boards that never had cs1 populated anyhow so making sure we do this always is fine and will correct things like omap3evm detecting an invalid amount of memory (384MB). Signed-off-by: NTom Rini <trini@ti.com>
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由 Tom Rini 提交于
Expand the "enable the config" comment to explain what the bit shifts are and define out two of the magic numbers. Signed-off-by: NTom Rini <trini@ti.com>
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由 Prabhakar Lad 提交于
Fix the condition for number of phys in davinci_eth_phy_detect() function. CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT indicates number of phys. From this commit id dc02bada davinci emac initilazed one less than the number of phy count. Signed-off-by: NPrabhakar Lad <prabhakar.csengg@gmail.com> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Christian Riesch 提交于
This patch avoids build breakage for SPLs that do not support printf. Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: NTom Rini <trini@ti.com> Acked-by: NAndreas Bießmann <andreas.devel@googlemail.com>
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由 Heiko Schocher 提交于
- booting from NOR Flash with direct boot method - POST support - LOGBUF support Signed-off-by: NHeiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Christian Riesch <christian.riesch@omicron.at>
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由 Heiko Schocher 提交于
move the board/davinci/common/misc.c file to arch/arm/cpu/arm926ejs/davinci/misc.c, so all davinci boards can use this functions. Signed-off-by: NHeiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
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由 Heiko Schocher 提交于
Signed-off-by: NHeiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
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由 Heiko Schocher 提交于
Signed-off-by: NHeiko Schocher <hs@denx.de> Acked-by: NTom Rini <trini@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
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由 Heiko Schocher 提交于
move struct davinci_rtc to arch/arm/include/asm/arch-davinci/hardware.h and add RTC_KICK0R_WE, RTC_KICK1R_WE defines, so they are global useable. Signed-off-by: NHeiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com>
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由 Christian Riesch 提交于
This patch replaces the pinmux configuration code in arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c by the code from arch/arm/cpu/arm926ejs/davinci/pinmux.c. Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Christian Riesch 提交于
The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors that contain pinmux configurations for emac, uarts, memory controllers... In an earlier patch such pinmux configurations were added to the arch tree. This patch makes the hawkboard use these definitions instead of defining its own. Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Christian Riesch 提交于
The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors that contain pinmux configurations for emac, uarts, memory controllers... In an earlier patch such pinmux configurations were added to the arch tree. This patch makes the da850evm use these definitions instead of defining its own. Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Christian Riesch 提交于
Up to now nearly every davinci board has separate code for the definition of pinmux configurations. This patch adds pinmux configurations for the DA850 SoCs to the arch tree which may later be used for all DA850 based boards. Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Christian Riesch 提交于
Pinmux configuration for the EMAC was done in a separate call of davinci_configure_pin_mux(). This patch moves all the pinmux configuration that is done for this board to a common place. Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Christian Riesch 提交于
The configuration in struct pinmux_config i2c_pins does not configure the pins for i2c but for uart. Since this function is already configured by struct pinmux_config uart2_pins the i2c_pins struct is obsolete. Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: NHeiko Schocher <hs@denx.de>
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由 Christian Riesch 提交于
Signed-off-by: NChristian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Nick Thompson <nick.thompson@ge.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: NHeiko Schocher <hs@denx.de> Acked-by: NNick Thompson <nick.thompson@ge.com>
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由 Heiko Schocher 提交于
always do the cpu critical inits in cpu_init_crit, and only jump to lowlevel_init, if CONFIG_SKIP_LOWLEVEL_INIT is not defined. Signed-off-by: NHeiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at>
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由 Ilya Yanok 提交于
Use software ECC for the SPL build if support for software ECC in SPL is enabled. Signed-off-by: NIlya Yanok <yanok@emcraft.com> Acked-by: NScott Wood <scottwood@freescale.com>
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由 Ilya Yanok 提交于
This patch adds support for software ECC to the nand_spl_simple driver. To enable this one have to define CONFIG_SPL_NAND_SOFTECC. Tested on OMAP3. Signed-off-by: NIlya Yanok <yanok@emcraft.com> Acked-by: NScott Wood <scottwood@freescale.com>
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由 Ilya Yanok 提交于
AM3517 specific CONTROL_PADCONF_* defines moved from board-specific files to <asm/arch-omap3/mux.h> Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Ilya Yanok 提交于
AM35xx has DaVinci-compatible EMAC. Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Ilya Yanok 提交于
For some reason code setting the speed based on the PHY feedback causes troubles on AM3517 so hardcode 100Mbps for now. Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Ilya Yanok 提交于
DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache enabled by default. So we have to take care and flush/invalidate the cache before/after the DMA operations. Please note that the receive buffer alignment to 32 byte boundary comes from the old driver version I don't know if it is really needed or alignment to cache line size is enough. Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Ilya Yanok 提交于
Added noop implementation for dcache operations that will buzz about missing real implementation and disable the dcache. This fixes compilation of DaVinci EMAC driver on arm926ejs. Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Ilya Yanok 提交于
Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Ilya Yanok 提交于
On AM35xx CPPI RAM had different addresses when accessed from the CPU and from the EMAC. We need to account this to deal with the buffer descriptors correctly. Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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由 Ilya Yanok 提交于
DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs also. This patch moves common defines from arch-davinci/emac_defs.h to drivers/net/davinci_emac.h DaVinci specific PHY drivers hacked to include the new header. We might want to switch to phylib in future. Signed-off-by: NIlya Yanok <yanok@emcraft.com>
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