It's important that buffer descriptors are aligned in accordance to GMAC
data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
for every bus width type.

If buffer descriptor is improperly aligned GMAC discards lower bits of
provided address and as a result reads from improper location that
doesn't match expected fields.

Commit ef76025a "net: Multiple
updates/enhancements to designware.c" introduced another structure
member "link_printed" right before buffer descriptors while "padding"
member was left untouched. This together with alignment of structure
itself to 16-byte boundary forces buffer descriptoprs always to be
4-byte aligned that causes driver complete disfunction if GMAC bus width
is 64 or 128-bit.

Proposed change makes sure all buffer descriptors are 16-byte (128-bit)
aligned.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
Patch: 277902

"bus mode" register contains lots of fields and some of them don't
expect to be written with 0 (zero). So since we're only interested in
resetting MAC (which is done with setting the least significant bit of
this register with "0") I believe it's better to modify only 1 bit of
the register.
Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com>
Acked-by: NVipin Kumar <vipin.kumar@st.com>
Patch: 277864

R8A7791 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7791.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Joe Hershberger <joe.hershberger@gmail.com>

AR8035 driver will be never applied because of wrong mask for
AR8031 driver. Fix this.
Signed-off-by: NHeiko Schocher <hs@denx.de>
Reported-by: NPavel Nakonechny <pavel.nakonechny@skitlab.ru>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Patch: 276944

This chip is compatible with other RTL8168 chips and can be found on the
NVIDIA Cardhu and Beaver boards.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Patch: 276475

currticks() is defined as get_timer(0), which returns an unsigned long,
so use %lu instead of %d to print the result.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Patch: 276473

Some phys (Micrel) have additional registers that can
be accessed using a special sequence. This patch allows
to use standard "mdio" command to accesss these registers.
Signed-off-by: NStefano Babic <sbabic@denx.de>

Signed-off-by: NStefano Babic <sbabic@denx.de>

Some phys (Micrel) has extended registers that must be
accessed in a special way. Add pointers to the phy driver
structure to allow to use these functions with mdio command.
Signed-off-by: NStefano Babic <sbabic@denx.de>

Signed-off-by: NStefano Babic <sbabic@denx.de>

Signed-off-by: NStefano Babic <sbabic@denx.de>

The 'get_phy_driver' code in 'drivers/net/phy/phy.c' uses the following
method to determine which driver is to be loaded for a particular PHY
module:

list_for_each(entry, &phy_drivers) {
	drv = list_entry(entry, struct phy_driver, list);
	if ((drv->uid & drv->mask) == (phy_id & drv->mask))
		return drv;
}

This means that a drv->mask of 0xfffff0 will return incorrect phy driver
for the logic above, even if the drv->uid is anything other than
something ending with a 0x0.

For e.g. if the RTL8211E drv->uid is 0x1cc915 and drv->mask is 0xffffff
and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xffffff0, then
the phy driver selected will always be RTL8211B even though the
underlying phy connected on the board is a 8211E module.

This patch fixes this issue.
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>

This patch adds support for VSC8514 PHY module which can be
found on Freescale's T1040RDB boards.
Signed-off-by: NArpit Goel <B44344@freescale.com>
Signed-off-by: NBhupesh Sharma <bhupesh.sharma@freescale.com>

R8A7790 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7790.
Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

The sh-eth of rmobile needs to use invalidate_cache* function.
This patch adds invalidate_cache* function.
Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Patch: 268948

sh-eth can change the alignment size of a packet descriptor according to BUS
size. This patch adds this function.
Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

The cache API of SH was changed from dcache_wback_range to flush_dcache_range.
sh-eth uses dcache_wback_range. This patch changes to flush_dcache_range.
Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

Avoid a recently introduced unused variable warning for boards that
use mvgbe but not phylib.
Signed-off-by: NSascha Silbe <t-uboot@infra-silbe.de>
Patch: 266334

Signed-off-by: NStephan Bauroth <stephan.bauroth@iav.de>
Patch: 265707

As AR8031 and AR8033 have same PHY ID 0x4dd074, they use the
common driver. Currently AR8031_driver didn't work for AR8033,
hence updated it to have it work on AR8031/AR8033.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com>

When the block 0 store to the memory of client and timeout at this
moment. Because of no ACK packet, the server will send block 0 again,
if this client reconnect to the server at this time,
TftpBlockWrapOffset will become larger than it should be.
Signed-off-by: NRockly <rocklygnome@gmail.com>
Patch: 264417

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

HOSTOS is defined and exported at the top Makefile.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

SPL_BIN is already defined in spl/Makefile
and it is used only in spl/Makefile.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

CONFIG_IXP4XX_NPE is defined only for CPU ixp.
It is not necessary to filter by CPU ixp.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

CONFIG_FMAN_ENET is defined only for CPU mpc85xx.
We do not need to filter by CPU mpc85xx.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

We do not need to handle $(LIBBOARD) and $(LIBS) separately.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>