- 27 3月, 2008 2 次提交
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由 Kumar Gala 提交于
Added the cpu command that provides a generic mechanism to get status, reset, and release secondary cores in multicore processors. Added support for using the ePAPR defined spin-table mechanism on 85xx. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 26 3月, 2008 38 次提交
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Joakim Tjernlund 提交于
The default settings for RTC DS1337 keeps the OSC output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to turn it off. Signed-off-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Wolfgang Denk 提交于
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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git://www.denx.de/git/u-boot-testing由 Bartlomiej Sieka 提交于
Conflicts: common/cmd_bootm.c cpu/mpc8xx/cpu.c Signed-off-by: NBartlomiej Sieka <tur@semihalf.com>
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由 Aras Vaichas 提交于
This patch changes the "usb storage" command to return success if it finds a USB storage device, otherwise it returns error. Signed-off-by: NMarkus Klotzbuecher <mk@denx.de>
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由 Anton Vorontsov 提交于
Linux understands "host" (default), "peripheral" and "otg" (broken). Though, U-Boot doesn't restrict dr_mode variable to these values (think of renames in future). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Anton Vorontsov 提交于
RTL8211B sets link state register after autonegotiation complete, so with bootdelay=0 RTL8211B will report lack of the link. To fix this, we should wait for aneg to complete, even if the link is currently down. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Anton Vorontsov 提交于
device_type = "soc" is being deprecated, newer device trees will use "fsl,soc" and/or "fsl,immr" for the soc nodes. This patch also adds clock-frequency property for soc nodes (the same value as bus-frequency). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Joe D'Abbraccio 提交于
With the original value of 1/2 clock cycle delay, the system ran relatively stable except when we run benchmarks that are intensive users of memory. When I run samba connected disk with a HDBENCH test, the system locks-up or reboots sporadically. Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
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由 Scott Wood 提交于
The device trees for these boards describe PCI I/O as starting from address zero from the device's perspective. Placing I/O elsewhere may cause problems with certain PCI boards, and may cause problems with Linux. Signed-off-by: NScott Wood <scottwood@freescale.com>
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由 Anton Vorontsov 提交于
At least on the "33MHz Pilot" board crystal is actually 33.3MHz. This patch fixes "system time drifting" problem. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This is needed to update /choosen/linux,stdout-path properly. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Plus modify environment to use it and remove bootfile env variable, it is internal and CONFIG_BOOTFILE is used for these purposes. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Current DDR setup easily causes memory corruption, this patch fixes it. Also fix TIMING_CFG0_MRS_CYC definition. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen controller and FHCI (QE USB). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This is needed for BCM PHYs to work on this board. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This patch adds basic support for Broadcom BCM5481 PHY. RXD-RXC delay quirk comes from MPC8360E-RDK BSP source, author is Peter Barada <peterb@logicpd.com>. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
PHY drivers will use it to setup software delay between RXD and RXC signals. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This is primarily for the early console support. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
On the MPC8377ERDB: 2 SATA and 2 PCI-E. On the MPC8378ERDB: 2 PCI-E On the MPC8379ERDB: 4 SATA Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
This patch adds few routines to configure serdes on 837x targets. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
..plus get rid of some #ifdefs in the .c files. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Anton Vorontsov 提交于
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
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由 Jerry Van Baren 提交于
Signed-off-by: NGerald Van Baren <vanbaren@cideas.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Michael Barkowski 提交于
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM. Signed-off-by: NMichael Barkowski <michael.barkowski@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Michael Barkowski 提交于
The following changes are based on kernel UCC ethernet performance: 1. Make the CSB bus pipeline depth as 4, and enable the repeat mode 2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT switch to enable this setting. The following changes are based on the App Note AN3369 and verified to improve memory latency using LMbench: 3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0 4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting previously. 5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on Twr=15ns, and this was already the setting in DDR_MODE) 6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on Trp=15ns) 7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on Tras=40ns) 8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on Trcd=15ns) 9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on Trfc=75ns) 10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based on Tfaw=50ns) 11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based on CL=3 and WL=2). Signed-off-by: NMichael Barkowski <michael.barkowski@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Michael Barkowski 提交于
Use available shift/mask macros to define DDR configuration. Signed-off-by: NMichael Barkowski <michael.barkowski@freescale.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Timur Tabi 提交于
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET. Cleaned up the board header files to make selecting the VSC7385 easier to control. Signed-off-by: NTimur Tabi <timur@freescale.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
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由 Timur Tabi 提交于
The Vitesse VSC7385 is a 5-port switch found on the Freescale MPC8349E-mITX and other boards. A small firwmare must be uploaded to its on-board memory before it can be enabled. This patch adds the code which uploads firmware (but not the firmware itself). Previously, this feature was provided by a U-Boot application that was made available only on Freescale BSPs. The VSC7385 firmware must still be obtained separately, but at least there is no longer a need for a separate application. Signed-off-by: NTimur Tabi <timur@freescale.com> Acked-by: NBen Warren <biggerbadderben@gmail.com>
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由 Wolfgang Denk 提交于
Signed-off-by: NWolfgang Denk <wd@denx.de>
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由 Jerry Van Baren 提交于
These defines embedded the u-boot env variables and/or the bd_t structure in the fdt blob. The conclusion of discussion on the u-boot email list was that embedding these in the fdt blob is not useful: there are better ways of passing the data (in fact, the fdt blob itself replaces the bd_t struct). The only board that enables these is the stxxtc and they don't appear to be used by linux. Signed-off-by: NGerald Van Baren <vanbaren@cideas.com> Acked-by: NKim Phillips <kim.phillips@freescale.com>
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由 Stefan Roese 提交于
Signed-off-by: NStefan Roese <sr@denx.de>
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