- 02 8月, 2015 3 次提交
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由 Ye.Li 提交于
Since the i.MX6QP has fixed the issue in boot ROM, so remove the workaround for i.MX6QP. Signed-off-by: NYe.Li <B37916@freescale.com> Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Since i.MX6QP changes some CCM registers, so modify the clocks settings to follow the hardware changes. In c files, use runtime check and discard #ifdef. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Signed-off-by: NYe.Li <B37916@freescale.com> Reviewed-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Peng Fan 提交于
Add cpu type for i.MX6QP/DP. This patch also fix is_mx6dqp(), since get_cpu_rev can return MXC_CPU_MX6QP and MXC_CPU_MX6DP, we should use: (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP)). Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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- 26 7月, 2015 21 次提交
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由 Otavio Salvador 提交于
Use more standard boot scripts and also add the capability of booting via NFS. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Use the same DCD settings from Congatec's U-boot tree for the P/N 016113 card. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Add SATA support. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Add LVDS and HDMI support. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Add USB support. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
cgtqmx6eval has a PFUZE100 FSL PMIC connected to I2C2. Add support for it. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Add thermal support so that we can see the following message on boot: CPU: Industrial temperature grade (-40C to 105C) at 33C Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
cgtqmx6eval has an eMMC connected to ESDHC3. Add support for it. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
There is no need to use multiple lines when they fit into a single line. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Perfoming an OR operation on the error is not a good approach. Return the error immediately for each ESDHC instance instead. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Declare 'static' when possible. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into the console and hitting enter afterwards, causes a hang in the system because CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error message: "Unknown command '' - try 'help'". Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve this problem. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Otavio Salvador 提交于
Remove the custom prompt and use the default instead. Signed-off-by: NOtavio Salvador <otavio@ossystems.com.br>
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由 Peng Fan 提交于
DCIMVAC is upgraded to DCCIMVAC for the individual processor (Cortex-A7) that the DCIMVAC is executed on. We should follow the linux dma follow. Before DMA read, first invalidate dcache then after DMA read, invalidate dcache again. With the DMA direction DMA_FROM_DEVICE, the dcache need be invalidated again after the DMA completion. The reason is that we need explicity make sure the dcache been invalidated thus to get the DMA'ed memory correctly from the physical memory. Any cache-line fill during the DMA operations such as the pre-fetching can cause the DMA coherency issue, thus CPU get the stale data. Signed-off-by: NPeng Fan <Peng.Fan@freescale.com> Signed-off-by: NYe.Li <B37916@freescale.com> Signed-off-by: NNitin Garg <nitin.garg@freescale.com> Signed-off-by: NJason Liu <r64343@freescale.com> Reviewed-by: NStefano Babic <sbabic@denx.de>
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由 Fabio Estevam 提交于
The variable 'ret' is used to store the value returned by pfuze_mode_init(), so it should be of type 'int' instead of 'unsigned int' in order to correctly handle negative numbers. Fix the variable type. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
The variable 'ret' is used to store the value returned by pfuze_mode_init(), so it should of type 'int' instead of 'unsigned int' in order to correctly handle negative numbers. Fix the variable type. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Warp has a MAX77696 PMIC connected via I2C1 bus. Add support for it. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Add support for MAX77696 PMIC. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
It seems that many comments were copied from the I2C uclass, so adjust the comments for the thermal class. Reported-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NOtavio Salvador <otavio@ossystems.com.br> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Adrian Alonso 提交于
* Extend imximage DCD version 2 to support DCD commands CMD_WRITE_CLR_BIT 4 [address] [mask bit] means: while ((*address & ~mask) != 0); CMD_CHECK_BITS_SET 4 [address] [mask bit] means: while ((*address & mask) != mask); CMD_CHECK_BITS_CLR 4 [address] [mask bit] means: *address = *address & ~mask; * Add set_dcd_param_v2 helper function to set DCD command parameters Signed-off-by: NAdrian Alonso <aalonso@freescale.com> Signed-off-by: NPeng Fan <Peng.Fan@freescale.com>
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由 Stefan Roese 提交于
This patch adds support for the "OHB System AG" baseboard with is equipped with the TQMa6S SoM. Signed-off-by: NStefan Roese <sr@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de>
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- 17 7月, 2015 1 次提交
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- 15 7月, 2015 15 次提交
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由 Bin Meng 提交于
We should not leave the expansion ROM address window open when there is not a valid ROM. Suggested-by: NMatt Porter <mporter@konsulko.com> Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NSimon Glass <sjg@chromium.org> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Currently PCI expansion ROM address is assigned by a call to pciauto_setup_rom() outside of the pci auto config process. This does not work when expansion ROM is on a device behind PCI bridge where bridge's memory limit register was already programmed to a value that does not cover the newly assigned expansion ROM address. To fix this, we should configure the ROM address during the auto config process. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NSimon Glass <sjg@chromium.org> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
This driver was originally added to support the native IDE mode for Intel chipset, however it has some bugs like not supporting ATAPI devices, endianness issue, or even broken build when CONFIG_LAB48. Given no board is using this driver as of today, rather than fixing all these issues we just remove it from the source tree. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
Update crownbay_defconfig and minnowmax_defconfig with 'savedefconfig' result so that the config option order matches Kconfig. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Bin Meng 提交于
On 32-bit machine strtol() returns LONG_MAX which is 0x7fffffff, which is wrong for u-boot.rom components like u-boot-x86-16bit.bin. Change to use strtoll() so that it works on both 32-bit and 64-bit machines. Reported-by: NFei Wang <wangfei.jimei@gmail.com> Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
To try to reduce the pain of confusion of binary blobs, add MD5 checksums for the current versions. This may worsen the situation as new versions appear, but it should still be possible to obtain these versions, and thus get a working setup. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Commit afbbd413 fixed this for non-driver-model. Make sure that the driver model code handles this also. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Adjust minnowmax to use driver model for PCI. This requires adding a device tree node to specify the ranges, removing the board-specific PCI code and ensuring that the host bridge is configured. Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This driver should use the x86 PCI configuration functions. Also adjust its compatible string to something generic (i.e. without a vendor name). Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
The layout of the ROM is a bit hard to discover by reading the code. Add a table to make it easier. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
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由 Simon Glass 提交于
Enable a SPI environment and store it in a suitable place. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Simon Glass 提交于
The logic is incorrect and currently has no effect. Fix it so that we can write to SPI flash, since by default it is write-protected. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Tested-by: NAndrew Bradford <andrew.bradford@kodakalaris.com>
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由 Simon Glass 提交于
The status register on ICH9 is a single byte, so use byte access when writing to it, to avoid updating the control register also. Signed-off-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NBin Meng <bmeng.cn@gmail.com> Reviewed-by: NJagan Teki <jteki@openedev.com>
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由 Bin Meng 提交于
Store VESA parameters to Linux setup header so that vesafb driver in the kernel could work. Signed-off-by: NBin Meng <bmeng.cn@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org> Tested-by: NJian Luo <jian.luo4@boschrexroth.de>
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