ohci-hcd casts priv_data pointer to (ohci_t *), thus it must be
the first member in private data struct.

Fixes 831cc98b ("usb: sunxi: Simplify ccm reg base code")
Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>

This bug is the combination of dwc2 USB controller and lan78xx
USB ethernet controller, which is the combination in use on
the Raspberry Pi Model 3 B+.

When the host attempts to receive a packet, but a packet has not
arrived, the lan78xx controller responds by setting BIR
(Bulk-In Empty Response) to NAK. Unfortunately, this hangs
the USB controller and requires the USB controller to
be reset.

The fix proposed is to have the lan78xx controller respond
by setting BIR to ZLP.
Signed-off-by: NAndrew Thomas <andrew.thomas@oracle.com>
Tested-by: NPeter Robinson <pbrobinson@gmail.com>
Reviewed-by: NAlexander Graf <agraf@suse.de>

When using a redundant environment a read error should simply mean to
not use that copy instead of giving up completely. The other copy may
be just fine.
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NIoan-Adrian Ratiu <adrian.ratiu@ni.com>

This fixes the warnings:

WARNING: no status info for 'ge_bx50v3'
WARNING: no maintainers for 'ge_bx50v3
Signed-off-by: NStefano Babic <sbabic@denx.de>

For now, the existing SPL MXS NAND driver only supports to identify
ONFi-compliant NAND chips. In order to allow identifying
non-ONFi-compliant chips add `mxs_flash_full_ident()` which uses the
`nand_get_flash_type()` functionality from `nand_base.c` to lookup
for supported NAND chips in the chip ID list.

For compatibility reason the full identification support is only
available if the config option `CONFIG_SPL_NAND_IDENT` is enabled.

The lookup was tested on a custom i.MX6ULL board with a Toshiba
TC58NVG1S3HTAI0 NAND chip.
Signed-off-by: NJörg Krause <joerg.krause@embedded.rocks>

The existing `mxs_flash_ident()` is limited to identify ONFi compliant
NAND chips only. In order to support non-ONFi NAND chips refactor the
function and rename it to `mxs_flash_onfi_ident()`.

A follow-up patch will add `mxs_flash_full_ident()` which allows to use
the chip ID list to lookup for supported NAND flashs.
Signed-off-by: NJörg Krause <joerg.krause@embedded.rocks>

Add the config option `CONFIG_SPL_NAND_IDENT` for using the NAND chip ID list
to identify the NAND flash in SPL.
Signed-off-by: NJörg Krause <joerg.krause@embedded.rocks>

`nand_get_flash_type()` allows identification of supported NAND flashs.
The function is useful in SPL (like mxs_nand_spl.c) to lookup for a NAND
flash (which does not support ONFi) instead of using nand_simple.c and
hard-coding all required NAND parameters.
Signed-off-by: NJörg Krause <joerg.krause@embedded.rocks>

Since commit 1da1938d ("spl: Add default values for ARCH_MX7")
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is selected by default on
i.MX7 platforms, so remove it from the board defconfig.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>

fdt_file is looking for imx6ul-geam-kit.dtb but Linux
has imx6ul-geam.dtb, since Linux skipped -kit on file name
by below commit.
"ARM: dts: imx6ul-geam: Skip suffix -kit from dts name"
(sha1: 182de5ebce71e469cfa686fcdf08c9cbe11ece97)

So, due to this mismatch U-Boot failed to pick the
proper dtb which eventually break the Linux boot.

This patch fixed this mismatch by
- renaming dts files
- update config option to use new dtb file
- update fdt_file to new dtb file name
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

The PFUZE3000 uses registers addresses up to 0xff.

The DM pfuze100 driver supports both pfuze100 and pfuze3000.  Allow it
to use the device type to return the correct number of registers.

Also rename the too generic PMIC_NUM_OF_REGS enumeration value for
pfuze3000 to match the other "PFUZE3000_" prefixed enumerations and the
pfuze100 enumeration value PFUZE100_NUM_OF_REGS.

Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NTrent Piepho <tpiepho@impinj.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Sync with Linux commit 60cc43fc8884 ("Linux 4.17-rc1").
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Add support for specified ECC strength/size using device tree
properties nand-ecc-strength/nand-ecc-step-size.

This aligns behavior with the mainline driver, such that:
- If fsl,use-minimal-ecc is requested it will use data from
  data sheet/ONFI. If this is not available the driver will fail.
- If nand-ecc-strength/nand-ecc-step-size are specified those
  value will be used.
- By default maximum possible ECC strength is used
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Support driver data from device tree. Also support fsl,use-minimal-ecc
similar to Linux' GPMI NAND driver.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Move structs into header file so we can use a separate compile
unit for device tree support.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Add use_minimum_ecc as struct mxs_nand_info field in preparation
for device tree support.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

In preparation for device tree support separate board init
from controller init similar to other raw NAND drivers.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

This function initializes DMA descriptors so mxs_nand_init_dma is
more precise. It also frees up the rather generic name mxs_nand_init.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Move GPMI and BCH register structs to the driver struct mxs_nand_info
in prepartion for device tree support.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Add support for minimum ECC strength supported by the NAND chip.
This aligns with the behavior when using the fsl,use-minimum-ecc
device tree property in Linux.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Report correct ECC parameters back to the stack. Do not report
bytes as we have it not immeaditly available and the Linux version
also does not report it. It seems to have no aversive effect.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Calculate BCH geometry at start and store the information in
a structure. This avoids recalculation on every page access
and allows to calculate ECC relevant information in one place.
This patch does not change ECC layout or driver behavior in
any way.

The patch aligns the driver somewhat with the Linux GPMI NAND
driver which drives the same IP.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Add config option which allows to enable on flash bad block table
support. This has the same effect as when using the device tree
property "nand-on-flash-bbt" in Linux.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Instead of completing initialization via scan_bbt callback use
NAND self init to initialize the GPMI (MXS) NAND controller.
Suggested-by: NScott Wood <oss@buserror.net>
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

In preparation to convert the driver to use NAND self init
provide a new minimal init for SPL builds. As a side effect
this also reduces size of SPL by about 4KiB.
Signed-off-by: NStefan Agner <stefan.agner@toradex.com>

Change sector size to 256KiB in table spi_flash_ids.
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

commit 84807922
("spi: omap3: Skip set_mode, set_speed from claim") did break SPI
support on my AM335x board.

The named commit:

- ignored the responsible arguments (speed, mode)
The set speed/mode function must use the supplied function arguments to
work properly. With this commit we take those arguments and transfer
them to the priv-data.

- used wrong udevice pointer for getting priv data
the udevice-pointer within function argument is already the spi-bus
device, so it is wrong looking here for some parent (ocp-bus in this
case) and getting priv-pointer from there.
Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: NJagan Teki <jagan@openedev.com>

Otherwise the frequency is zero and the clock divider cannot be setup by
'omap3_spi_set_speed' function.
Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: NJagan Teki <jagan@openedev.com>

CS GPIO activation low/high is determinated by the device tree
so we don't need to take in accoung in cs_activate and cs_deactivate
Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr'
linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509
Signed-off-by: NMichael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>

This patch replaced "return 0" with "return status" to fix the
incorrect return value error reported by the coverity.
Reviewed-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NVipul Kumar <vipul.kumar@xilinx.com>
[jagan: rebased on master]
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>

Each entry of the EFI memory descriptors occupies map->desc_size,
not sizeof(struct efi_mem_desc).
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

At present in dram_init_banksize() it ignores conventional memory
above 4GB. This leads to wrong DRAM size is printed during boot.
Remove such limitation.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Enable PRE_CONSOLE_BUFFER so that the full boot output can be viewed
on the video console for the EFI payload.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

The use_uart assignment should follow immediately after the call to
exit_boot_services(), in case we want some debug output after that.
Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>