- 04 1月, 2017 22 次提交
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由 Andre Przywara 提交于
Now that the SPL is ready to be compiled in AArch64 and the DRAM init code is ready, enable SPL support for the A64 SoC and in the Pine64 defconfig. For now we keep the boot0 header in the U-Boot proper, as this allows to still use boot0 as an SPL replacement without hurting the SPL use case. We disable FEL support for now by making its compilation conditional and disabling it for ARM64, as the code isn't ready yet. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
Fix the output of the DRAM size on AArch64 SPLs. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
According to Jens disabling the on-die-termination should set bit 5, not bit 1 in the respective register. Fix this. Reported-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Jens Kuske 提交于
The A64 DRAM controller is very similar to the H3 one, so the code can be reused with some small changes. This refactoring does not change the code size for the existing H3 part. [Andre: rework from #ifdefs to using socid parameters in static functions, minor fixes, merging in fixes from Jens] Signed-off-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Philipp Tomsich 提交于
Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Jens Kuske 提交于
So far the DRAM driver for the H3 SoC (and apparently boot0/libdram as well) only applied coarse delay line settings, with one delay value for all the data lines in each byte lane and one value for the control lines. Instead of setting the delays for whole bytes only allow setting it for each individual bit. Also add support for address/command lane delays. For the purpose of this patch the rules for the existing coarse settings were just applied to the new scheme, so the actual register writes don't change for the H3. Other SoCs will utilize this feature later properly. With a stock GCC 5.3.0 this increases the dram_sun8i_h3.o code size from 2296 to 2344 Bytes. [Andre: move delay parameters into macros to ease later sharing, use defines for numbers of delay registers, extend commit message] Signed-off-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Jens Kuske 提交于
The IOCR registers got renamed to BDLR to match the public documentation of similar controllers. Signed-off-by: NJens Kuske <jenskuske@gmail.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Philipp Tomsich 提交于
So far the MBUS priority setup was done by writing "magic" values taken from a DRAM controller register dump after a boot0 run. By peeking at the Linux (sic!) MBUS driver [1] from the Allwinner BSP kernel, we learned more about the actual meaning of those bits. Add macros and refactor the setup function to make the MBUS setup much more readable and meaningful. The actual values used now are a transformation of the values used before, which are assembled by the new code to result in the same register writes. So this rework does not change any settings, also the code size stays the same. The respective source files in the BSP kernel had a proper GPL header, so lifting this code and information into U-Boot is legal. [Andre: provide a convenience macro to fit definitions on one line] [1] https://github.com/longsleep/linux-pine64/blob/lichee-dev-v3.10.65/drivers/bus/sunxi_mbus.cSigned-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
To avoid enumerating the very same DRAM values in defconfig files for each and every Allwinner A64 board out there, let's put some sane default values in the Kconfig file. Boards with different needs can override them at any time. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The Allwinner A64 SoC starts execution in AArch32 mode, and both the boot ROM and Allwinner's boot0 keep running in this mode. So U-Boot gets entered in 32-bit, although we want it to run in AArch64. By using a "magic" instruction, which happens to be an almost-NOP in AArch64 and a branch in AArch32, we differentiate between being entered in 64-bit or 32-bit mode. If in 64-bit mode, we proceed with the branch to reset, but in 32-bit mode we trigger an RMR write to bring the core into AArch64/EL3 and re-enter U-Boot at CONFIG_SYS_TEXT_BASE. This allows a 64-bit U-Boot to be both entered in 32 and 64-bit mode, so we can use the same start code for the SPL and the U-Boot proper. We use the existing custom header (boot0.h) functionality, but restrict the existing boot0 header reservation to the non-SPL build now. A SPL wouldn't need such header anyway. This allows to have both options defined and lets us use one for the SPL and the other for U-Boot proper. Also add arch/arm/mach-sunxi/rmr_switch.S, which contains the original ARM assembly code and instructions how to re-generate the encoded version. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The ENABLE_ARM_SOC_BOOT0_HOOK option is a generic option shared with other boards. To allow alternative code to be inserted, we create another, now function specific config symbol on top of it to simplify later additions. No functional change at this time. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
For prepending some board specific header area to U-Boot images we were so far including a header file with a macro definition containing the actual header specification. This works fine if there are just a few statements and if there is only one alternative. However adding more complex code quickly gets messy with this approach, so let's just drop that intermediate macro and let the #include actually insert the code directly. This converts the callers and the callees, but doesn't change anything at this point. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Tested-by: NSteve Rae <steve.rae@raedomain.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The boot0 hook we have so far is applied _after_ the initial branch to the "reset" entry point. An upcoming change requires even this branch to be changed, so we apply the hook macro at the earliest point, and have the branch in the hook file as well. This is no functional change at this point, just refactoring to simplify upcoming patches. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The sunxi DRAM setup code needs an sdelay() implementation, which wasn't defined for armv8 so far. Shamelessly copy the armv7 version and adjust it to work in AArch64. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
Since entry_point and load_addr are addresses, they should be represented as longs to cover the whole address space and to avoid warning when compiling the SPL in 64-bit. Also adjust debug prints to add the 'l' specifier, where needed. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The UL() macro is pretty useful in sharing constants between assembly and C files while still being able to specify a type for C. Move the macro from an armv8 specific header into a common header file to be able to use it by arm code (for instance) as well. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
tiny-printf does not know about the "-" modifier, which aligns numbers. This is used by some SPL code, but as it's purely cosmetical, we just ignore this modifier here to avoid changing correct printf strings. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
tiny-printf does not know about the "l" modifier so far, which breaks the crash dump on AArch64, because it uses %lx to print the registers. Add an easy way of handling longs correctly. Using a relatively decent compiler (GCC 5.3.0) this does _not_ increase the code size of tiny-printf.o for 32-bit builds (where long and int are actually the same), actually it looses three (ARM Thumb2) instructions from the actual SPL (numbers for orangepi_plus_defconfig): text data bss dec hex filename 758 0 0 758 2f6 spl/lib/tiny-printf.o before 18839 488 232 19559 4c67 spl/u-boot-spl before 758 0 0 758 2f6 spl/lib/tiny-printf.o after 18833 488 232 19553 4c61 spl/u-boot-spl after This adds some substantial amount of code to a 64-bit build, though: (taken after a later commit, which enables the ARM64 SPL build for sunxi) text data bss dec hex filename 1542 0 0 1542 606 spl/lib/tiny-printf.o before 25830 392 360 26582 67d6 spl/u-boot-spl before 1758 0 0 1758 6de spl/lib/tiny-printf.o after 26040 392 360 26792 68a8 spl/u-boot-spl after Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
For boards that call s_init() when the SPL runs, we are expected to setup an early stack before calling this C function. Implement the proper AArch64 version of this based on the ARMv7 code. This allows sunxi boards to setup the basic peripherals even with a 64-bit SPL. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
The predominantely 32-bit ARM targets try to compile the SPL in Thumb mode to reduce code size. The 64-bit AArch64 instruction set does not know an alternative, concise encoding, so the Thumb build option should only be set for 32-bit targets. Likewise -marm machine options are only valid for ARMv7 targets. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NTom Rini <trini@konsulko.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Andre Przywara 提交于
These days many Allwinner SoCs use clock_sun6i.c, although out of them only the (original sun6i) A31 has a second MBUS clock register. Also the requirement for setting up the PRCM PLL_CTLR1 register to provide the proper voltage seems to be a property of older SoCs only as well. Restrict the MBUS initialization to this SoC only to avoid writing bogus values to (undefined) registers in other chips. I can only verify that the PLL voltage setup is not needed for H3 and A64, so for now we only spare those two SoCs. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NChen-Yu Tsai <wens@csie.org> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NJagan Teki <jagan@openedev.com>
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由 Priit Laes 提交于
Fix typo introduced in ebc4ef61Signed-off-by: NPriit Laes <plaes@plaes.org> Reviewed-by: NJagan Teki <jagan@openedev.com>
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- 03 1月, 2017 18 次提交
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Fabio Estevam 提交于
The standard way is to put ifdef/endif in the very first column. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
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由 Jagan Teki 提交于
Enable I2C support for Engicam GEAM6UL NAND module. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Add Jagan as MAINTAINERS of configs/imx6ul_geam_nand_defconfig Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Add FIT image booting from MMC device, during MMC bootcmd u-boot env script look for bootscript, else fit image or else finally look for legacy image uImage. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
- Add tab space - remove exctra 'mmc dev ${mmcdev}' Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Enabling FIT along with Signature will make bootm to not-understanding u-boot legacy image formats like uImage, etc. So this patch enabling legacy image format for backward compatibility. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Enable Flattened Image Tree support for all Engicam boards. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Add config options for booting Linux from NAND in UBI format. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Create ubifs.img: $ mkfs.ubifs -q -r /rootfs -m 4096 -e 253952 -c 7936 -o ubifs.img Write ubifs.img: --------------- icorem6qdl> nand erase.part rootfs icorem6qdl> ubi part rootfs icorem6qdl> ubi create rootfs icorem6qdl> ext4load mmc 0:2 ${loadaddr} ubifs.img 166592512 bytes read in 8091 ms (19.6 MiB/s) icorem6qdl> ubi write ${loadaddr} rootfs ${filesize} 166592512 bytes written to volume rootfs icorem6qdl> ubifsmount ubi0:rootfs Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
For writing Linux or rootfs on to NAND, the best suitable way is to use MMC commands since MMC driver by default enabled by mx6_common.h, hence enabled MMC commands in nand defconfigs. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
gpmi-nand is the proper name used in nand driver from Linux for all imx related nand boards, so rename mtdparts name as gpmi-nand instead of nand, this will eventually reflects all nand info to Linux from u-boot like mtdparts. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Boot Linux with uImage instead of zImage, so update bootz with bootm. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Jagan Teki 提交于
Increase the nand kernel partition size, for supporting large uImage files, maximum 8MiB. Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
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由 Uri Mashiach 提交于
Modify U-Boot default env settings. Boot sequence: 1. SD card boot script 2. SD card boot no script 3. SATA boot script 4. SATA boot no script 5. eMMC boot script 6. eMMC boot no script Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Dmitry Lifshitz 提交于
Add MAC support. Use PHY, connected to RGMII1 as a default Eth adapter, by appropriate setting of 'cpsw_data.active_slave'. 'cpsw_phy' env variable can override this setting. Set the MAC addresses in the U-Boot environment. The addresses are retrieved from the on-board EEPROM or from the SOC's MAC fuses. Set the following PHYs RGMII clock delays: - Enable RX delay - Disable TX delay Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il> [uri.mashiach@compulab.co.il: add RGMII clock delays] Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Dmitry Lifshitz 提交于
Add PCB revision message. Implement board revision get_board_rev API. Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il> Commit description update. Signed-off-by: NUri Mashiach <uri.mashiach@compulab.co.il> Acked-by: NIgor Grinberg <grinberg@compulab.co.il> Reviewed-by: NTom Rini <trini@konsulko.com>
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