Configure SAI PLL configuration to generate LTDC pixel clock on
the PLLSAIR output.

PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Rework the way SDMMC clock get rate is done in a more
generic way :

_ Add stm32_clk_get_pllsai_rate() which give the PLLSAI
  indicated output rate.

_ Add stm32_clk_get_pllsai_vco_rate() which give the VCO
  internal rate.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Initially, 48Mhz for SDIO clock was generated from SAI pll for
STM32F469 and STM32F746 SoCs, but this solution was not suitable
for STM32F429 SoCs.

A generic solution is to used the PLL_Q output as 48Mhz clock
for all STM32F SOCs family.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Use the correct name for RCC_PLLSAICFGR_PLLSAIx_MASK masks.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Wrong parameter was passed to stm32_clk_pll48clk_rate().
sysclk (PLL_p output value) was passed instead of VCO value.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

This patch adds "st,pin-ckin" support to activate sdmmc_ckin feature.
When using an external driver (a voltage switch transceiver),
it's advised to select SDMMC_CKIN feedback clock input to sample
the received data.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

The hardware flow control functionality is used to avoid
FIFO underrun (TX mode) and overrun (RX mode) errors.
The behavior is to stop SDMMC_CK during data transfer and
freeze the SDMMC state machines.
Signed-off-by: NPatrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Use available DM stm32_timer driver instead of dedicated
mach-stm32/stm32fx/timer.c.

Remove all defines or files previously used for timer usage in
arch/arm/include/asm/arch-stm32fx and in arch/arm/mach-stm32/stm32fx

Enable DM STM32_TIMER for STM32F4/F7 and H7.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

Add missing timer node to enable timer5 for STM32F7 SoCs family
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

d1cfgr register was used to calculate the domain 3
prescaler value instead of d3cfgr.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

For timer clock, an additional prescaler is used which
was not taken into account previously.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

For timer clock, an additionnal prescaler is used which was
not taken into account previously.
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

This timer driver is using GPT Timer (General Purpose Timer)
available on all STM32 SOCs family.
This driver can be used on STM32F4/F7 and H7 SoCs family
Signed-off-by: NPatrice Chotard <patrice.chotard@st.com>

RK3288 Vyasa has eMMC boot support, with JP4 open.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Add usb otg support for rk3288-vyasa, board support usb1 otg
power through otg_vbus_drv and naming conversion followed
as per schematic.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Add usb host support for rk3288-vyasa, board support hub power
through phy_pwr_en and usb2 host power through usb2_pwr_en and
naming conversion followed as per schematic.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Enable gmac support for rk3288-vyasa board.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Sync gmac dts node from Linux.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Add supporting regulators for rk3288-vyasa board, dc12_vbat is
parent regulatorand followed regulators as are child regulators.
regulator naming conversion followed as per schematic for better
readability and easy for identification.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

rk808, SWITCH_REG1 has configured for sdmmc regulator as vcc_sd,
so use the same by renaming vcc33_sd to vcc_sd(as per schematic)
and drop explicit regulator definition from root.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

vdd_log, never used on DCDC_REG1 of rk808 from latest schematic so
remove the same and update the regulator-name as 'vdd_arm' to sync
with existing rk3288 board dts files.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Sync rk3288-vyasa board dts from Linux for proper updates and maintenance
- rk3288-vyasa.dts: Similar to Linux dts
- rk3288-vyasa-u-boot.dtsi: u-boot dts changes

Also updated MAINTAINERS for these dts files.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Booting a aarch64 Linux kernel requires the image to be placed
text_offset bytes from a 2MB aligned address.
See https://www.kernel.org/doc/Documentation/arm64/booting.txt

booti_setup() takes care about this alignment and will relocate the
image if not properly aligned with memmove(). This can require up
to double the size of the loaded image and therefore accidentally
overwrite content placed there (i.e ramdisk_addr_r) for large kernel
images.

By adding text_offset to the default kernel_addr_r we can prevent that
from happening for kernels larger 18MB and also save a few cycles.

We can assume a text_offset of 0x80000 for most cases, all others will be
handled by booti_setup() anyway.
Signed-off-by: NKlaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

use live dt api to get base addr
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Use live dt api to get cru base addr.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Use live dt api to get cru base addr.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Use live dt api to get cru base addr.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Use live dt api to get cru base addr.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Use live dt api to get cru base addr.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Use live dt api to get cru base addr.
Signed-off-by: NKever Yang <kever.yang@rock-chips.com>
Acked-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

commit 8c4037a0 ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.") makes the DCD field being NULL a
dependency.

This change though will break loading and executing of existing pre-signed
binaries on a u-boot update i.e. if this change is deployed on a board you
will be forced to redo all images on that board to NULL out the DCD.

There is no prior guidance from NXP that the DCD must be NULL similarly
public guidance on usage of the HAB doesn't call out this NULL dependency
(see boundary devices link).

Since later SoCs will reject a non-NULL DCD there's no reason to make a
NULL DCD a requirement, however if there is an actual dependency for later
SoCs the appropriate fix would be to do SoC version checking.

Earlier SoCs are capable (and happy) to authenticate images with non-NULL
DCDs, we should not be forcing this change on downstream users -
particularly if it means those users now must rewrite their build systems
and/or redeploy signed images in the field.

Fixes: 8c4037a0 ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.")
Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Link: https://boundarydevices.com/high-assurance-boot-hab-dummiesReviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

The README.mxc_hab is outdated and need improvements, add the following
modifications:

- Reorganize document and remove duplicate content
- Add CST download link
- Update CST package name
- Align command lines with CST v2.3.3
- Update U-Boot binary name
- Remove CSF padding since is not documented in AN4581
Signed-off-by: NBreno Lima <breno.lima@nxp.com>

Currently the High Assurance Boot procedure is documented in two
places:

- doc/README.imx6
- doc/README.mxc_hab

It is better to consolidate all HAB related information into
README.mxc_hab file, so move the content from README.imx6 to
README.mxc_hab.
Signed-off-by: NBreno Lima <breno.lima@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

commit cd2d4600 ("arm: imx: hab: Add IVT header definitions") declares
struct ivt_header as "__attribute__((packed))".

commit ed286bc8 ("imx: hab: Check if CSF is valid before
authenticating image") declares struct hab_hdr with __packed.

This patch makes the __packed convention consistent.
Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

commit ed286bc8 ("imx: hab: Check if CSF is valid before authenticating
image") makes use of "__packed" as a prefix to the "struct hab_hdr"
declaration.

With my compiler "gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)" we
get:

./arch/arm/include/asm/mach-imx/hab.h:42:25: error: expected ‘=’, ‘,’, ‘;’,
‘asm’ or ‘__attribute__’ before ‘{’ token
 struct __packed hab_hdr {

Fix this problem by including <linux/compiler.h>
Signed-off-by: NBryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

This patch fixes the wrongly included dtsi file which was
breaking mainline support for Engicam i.CoreM6 DualLite/Solo RQS.

Linux commit details for the same change as
"ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6
DualLite/Solo RQS"
(sha1: c0c6bb2322964bd264b4ddedaa5776f40c709f0c)
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

usdhc4 node need to update pinctrl, bus-width and non-removable
properties, sync the same from Linux.
Signed-off-by: NJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>