- 22 7月, 2015 25 次提交
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由 Simon Glass 提交于
Add basic support for MMC, providing a uclass which can set up an MMC device. This allows MMC drivers to move to using driver model. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a few messages to indicate progress and failure. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a simple driver which allows use of LEDs attached to GPIOs. The linux device tree binding is used. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a simple uclass for LEDs, so that these can be controlled by the device tree and activated when needed. LEDs are referred to by their label. This implementation requires a driver for each type of LED (e.g GPIO, I2C). Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Many SoCs have a number of system controllers which are dealt with as a group by a single driver. It is a pain to have to add lots of compatible strings and/or separate drivers for each. Instead we can identify the controllers by a number and request the address of the one we want. Add a simple implementation of this which can be used by SoC driver code. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Add a simple implementaton of register maps, supporting only direct I/O for now. This can be enhanced later to support buses which have registers, such as I2C, SPI and PCI. It allows drivers which can operate with multiple buses to avoid dealing with the particulars of register access on that bus. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This function can be used for testing to manually request a GPIO for use, without resorting to the legacy GPIO API. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Provide a driver-model function to look up a GPIO name. Make the standard function use it. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Now that we support driver model in SPL, allow GPIO drivers to be used there also. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This parameter is named 'seq' but should be named 'of_offset'. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
In some rare cases it is useful to be able to locate a device given a device tree node offset. An example is when you have an alias that points to a node and you want to find the associated device. The device may be SPI, MMC or something else, but you don't need to know the uclass to find it. Add a function to do a global search for a device, given its device tree offset. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
To avoid bloating SPL code, use debug() where possible in the driver model core code. The error code is already returned, and can be investigated as needed. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
In SPL it is sometimes useful to be able to obtain a dump of the current driver model state. Since commands are not available, provide a way to directly call the functions to output this information. Adjust the existing commands to use these functions. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
At present printf() skips output if it can see there is no console. This is really just an optimisation, and is not necessary. Also it is currently incorrect in some cases. Rather than update the logic, just remove it so that we don't need to keep it in sync. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
When there is no console ready, allow the debug UART to be used for output. This makes debugging of early code considerably easier. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This does not actually help any current arch. For x86 it makes it harder to call (requires stack) and for ARM it has no effect. Drop it. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
U-Boot uses structures for hardware access so it is important that these structures are correct. Add a way of asserting that a structure member is at a particular offset. This can be created using the datasheet for the hardware. This implementation uses Static_assert() since BUILD_BUG_ON() only works within functions. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Driver-model I2C drivers can be picked up by the linker script rule for legacy drivers. Change the order to avoid this. We could make the legacy code depend on !CONFIG_DM_I2C but that is not necessary and it is good to keep conditions to a minimum. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
The SPL device tree size must be minimised to save memory. Only include properties that are needed by SPL - this is determined by the presence of the "u-boot,dm-pre-reloc" property. Also remove a predefined list of unused properties from the nodes that remain. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
This tool allows us to extract subsets of a device tree file. It is used by the SPL vuild, which needs to cut down the device tree size for use in limited memory. This tool was originally written for libfdt but it has not been accepted upstream, so for now, include it in U-Boot. Several utilfdt library functions been included inline here. If fdtgrep is eventually accepted in libfdt then we can bring that version of libfdt in here, and drop fdtgrep (requiring that fdtgrep is provided by the user). If it is not accepted then another approach would be to write a special tool for chopping down device tree files for SPL. While it would use the same libfdt support, it would be less code than fdtgrep.c because it would not have general-purpose functions. Another approach (which was used with v1 of this series) is to sprinkler all the device tree files with #ifdef. I don't like that idea. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
These have been sent upstream but not accepted to libfdt. For now, bring these into U-Boot to enable fdtgrep to operate. We will use fdtgrep to cut device tree files down for SPL. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Property names are stored in a string table. When a node property is removed, the string table is not updated since other nodes may have a property with the same name. Thus it is possible for the string table to build up a number of unused strings. Add a function to remove these. This works by building a new device tree from the old one, adding strings one by one as needed. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Offer to display the available image types in help. Also, rather than hacking the genimg_get_type_id() function to display a list of types, do this in the tool. Also, sort the list. The list of image types is quite long, and hard to discover. Print it out when we show help information. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Provide access to the dhrystone benchmark command. Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
Drystone provides a convenient sanity check that the CPU is running at full speed. Add this as a command which can be enabled as needed. Note: I investigated using Coremark for this but there was a license agreement and I could not work out if it was GPL-compatible. Signed-off-by: NSimon Glass <sjg@chromium.org>
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- 21 7月, 2015 15 次提交
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由 Zhichun Hua 提交于
When final MMU table is setup in DDR, TCR attributes must match those of the memroy for cacheability and shareability. Signed-off-by: NZhichun Hua <zhichun.hua@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com>
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由 Zhichun Hua 提交于
For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit position [13:12] of TCR_ELx register. Signed-off-by: NZhichun Hua <zhichun.hua@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com>
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Freescale DSPI driver has been converted to Driver Model. The new driver depends on OF_CONTROL, DM, DM_SPI. This patch enable FSL_DSPI and its dependence configure options. Signed-off-by: NHaikun Wang <haikun.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Haikun Wang 提交于
Enable DSPI flash related configurations for LS2085ARDB. Signed-off-by: NHaikun Wang <haikun.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Haikun Wang 提交于
Enable DSPI flash related configurations. Signed-off-by: NHaikun Wang <haikun.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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DSPI has pin muxing with SDHC and other IPs, this patch check the value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig" variable. If those pins are configured to DSPI and "hwconfig" enable DSPI, set the BRDCFG5 of QIXIS CPLD to configure the routing to on-board SPI memory. Otherwise will configure to SDHC. DSPI is enabled in "hwconfig" by appending "dspi", eg. setenv hwconfig "$hwconfig;dspi" Signed-off-by: NHaikun Wang <Haikun.Wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Haikun Wang 提交于
DSPI has pin muxing with SDHC and other IPs, this patch check the value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig" variable. If those pins are configured to DSPI and "hwconfig" enable DSPI, set the BRDCFG5 of QIXIS FPGA to configure the routing to on-board SPI memory. Otherwise will configure to SDHC. DSPI is enabled in "hwconfig" by appending "dspi", eg. setenv hwconfig "$hwconfig;dspi" Signed-off-by: NHaikun Wang <haikun.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Haikun Wang 提交于
Signed-off-by: NHaikun Wang <haikun.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Haikun Wang 提交于
Add dts source files for LS2085AQDS and LS2085ARDB boards. Signed-off-by: NHaikun Wang <haikun.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Haikun Wang 提交于
Add DSPI controller dts node in fsl-ls2085a.dtsi Signed-off-by: NHaikun Wang <haikun.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Haikun Wang 提交于
Bring in required device tree files for ls2085a from Linux. These are initially unchanged and have a number of pieces not needed by U-Boot. Signed-off-by: NHaikun Wang <Haikun.Wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Alison Wang 提交于
As SCFG_ENDIANCR register is added to choose little-endian or big-endian for audio IPs on Rev2.0 silion, little-endian mode is selected. Signed-off-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Wang Dongsheng 提交于
Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform. Tested on LS1021AQDS, LS1021ATWR. Test CPU hotplug times: 60K Test kernel boot times: 1.2K Signed-off-by: NWang Dongsheng <dongsheng.wang@freescale.com> Acked-by: NAlison Wang <alison.wang@freescale.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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由 Wang Dongsheng 提交于
timer_wait is moved from sunxi/psci_sun7i.S, and it can be converted completely into a reusable armv7 generic timer. LS1021A will use it as well. Signed-off-by: NWang Dongsheng <dongsheng.wang@freescale.com> Reviewed-by: NHans de Goede <hdegoede@redhat.com> Reviewed-by: NYork Sun <yorksun@freescale.com>
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