- 01 10月, 2011 40 次提交
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由 Marek Vasut 提交于
mxc_ata.c: In function ‘set_ata_bus_timing’: mxc_ata.c:118: warning: dereferencing type-punned pointer will break strict-aliasing rules mxc_ata.c:125: warning: dereferencing type-punned pointer will break strict-aliasing rules mxc_ata.c:129: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Fabio Estevam 提交于
When building the zmx25 target we get: Configuring for zmx25 board... generic.c:108: warning: 'get_reset_cause' defined but not used Fix this warning by defining get_reset_cause only if CONFIG_DISPLAY_CPUINFO is defined. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Cc: Matthias Weisser <weisserm@arcor.de> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c Cc: Matthias Weisser <weisserm@arcor.de> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
Rewrite the mxc_i2c driver. * This version is much closer to Linux implementation. * Fixes IPG_PERCLK being incorrectly used as clock source * Fixes behaviour of the driver on iMX51 * Clean up coding style a bit ;-) Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Jason Hui <jason.hui@linaro.org> Acked-by: NJason Liu <jason.hui@linro.org> Acked-by: NHeiko Schocher <hs@denx.de> Tested-by: NJason Liu <jason.hui@linro.org>
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由 Marek Vasut 提交于
The new output looks like this: > clocks PLL1 800 MHz PLL2 665 MHz PLL3 216 MHz AHB 133000 kHz IPG 66500 kHz IPG PERCLK 665000 kHz Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Acked-by: NStefano Babic <sbabic@denx.de> Acked-by: NJason Liu <jason.hui@linaro.org>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <jason.hui@linaro.org> Acked-by: NJason Liu <jason.hui@linaro.org>
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由 Marek Vasut 提交于
The PLL decoding algorithm didn't take into account many configuration bits. Adjust it according to Linux kernel. Also, add PLL4 for MX53. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Hui <jason.hui@linaro.org> Tested-by: NJason Liu <Jason.hui@linaro.org>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NStefano Babic <sbabic@denx.de> Acked-by: NJason Liu <jason.hui@linaro.org>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NJason Liu <jason.hui@linaro.org>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Let common code set the machine ID. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
As only one RAM bank is used we can rely on the code from arch/arm/lib/board.c Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
This patch allows user to register multiple FEC controllers. To preserve compatibility with older boards, the mxcfec_register() call is still in place. To use multiple controllers, new macro is in place, the mxcfec_register_multi(), which takes more arguments. The syntax is: mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address); To disable the fecmxc_register() compatibility stuff, define the macro CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE and CONFIG_FEC_MXC_PHYADDR. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
The default is MII100, which was hardcoded previously in the driver. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
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由 Jason Liu 提交于
This is cosmetic patch for the help message: Before: pmic dump [numregs] dump registers After: pmic dump [numregs] - dump registers Signed-off-by: NJason Liu <jason.hui@linaro.org> Acked-by: NStefano Babic <sbabic@denx.de>
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由 Marek Vasut 提交于
This magic constant with zero documentation, when it's last 8 bits are set to 0x45, configures correctly the PERCLK dividers. Therefore the I2C operates correctly when divider computed from PERCLK. Note: This constant is written to CBCDR register in arch/arm/cpu/armv7/mx5/lowlevel_init.S, but it's written only once. The register is accessed three more times in the file, with different values written to it each time. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com>
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由 Fabio Estevam 提交于
Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes. Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt and there was no activity, the system entered into idle mode while watchdog timer was still active. Fix this by disabling watchdog timer during idle mode. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Add the initial support for MX25PDK booting from SD card via internal boot. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Avoid the usage of extern in C file as pointed out by checkpatch. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Change the prompt as done in other i.MX boards. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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由 Fabio Estevam 提交于
Currently the reset cause is printed like: CPU: Freescale i.MX31 rev 2.0 at 531 MHz.Reset cause: POR Improve readability by adding a new line like it is done on other i.MX boards. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
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