Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter
configuration support for P1/P2 RDB.
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that
we can capture the LAW target for a given PCI or PCIE controller.  Also update
the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the
LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure.

This will allow future PCI[E] code to configure the LAW target automatically,
rather than requiring each board to it for each PCI controller separately.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The e5500 has a link register stack and segment target address cache.
Its safe to enable these bits on older e500 cores as the bits are
implemented in the register.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Each platform had its own version of the upmconfig, despite the
init process being identical.  Now that we have a spot for common
lbc code, create a common upmconfig() there.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Add printing of LAWBARH/LAWBARL for FSL_CORENET platforms.
Signed-off-by: NBecky Bruce <Beckyb@kernel.crashing.org>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The current code redefines functions based on FSL_CORENET_ vs not -
create macros/inlines instead that hide the differences.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This dumps out the contents of TLB1 on 85xx-based systems.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Extract the operation to read a tlb into a function - we will need
this later to print out the tlbs, and there's no point in duplicating
the code.  Create a TSIZE_TO_BYTES macro to deal with the conversion
from the MAS field to an actual size instead of duplicating this in code.
There are a few misc other minor cleanups.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Some parts that have an Enhanced Local Bus Controller weren't
setting CONFIG_FSL_ELBC.  Fix this so we can use this define
properly going forward (currently it's only used if PHYS_64BIT is
set, which meant not all platforms needed to have it set correctly).
Signed-off-by: NBecky Bruce <beckyb@kernel.crashing.org>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NVivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

We have several boards that use the same ICS307 CLK chip to drive the
System clock and DDR clock.  Move the code into a common location so we
share it.

Convert the P2020DS board as the first to use the new common ICS307
code.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NTimur Tabi <timur@freescale.com>

The various boards that have PIXIS FPGAs have slightly different
register definitions, however there is some common functionality (like
reset, ICS307 clk control, etc) that can be shared.

The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS,
MPC8610HPCD, and MPC8641HPCN boards.

Also fixed ngpixis to be __packed__ instead of aligned.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

If we explicitly disabled a core remove it from the dtb we pass on to
the kernel.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

We may have cpu-handles pointing to the cpu nodes we delete.  If so we
should delete the handles as well.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomodate incompatible code changes.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The SPI env code didn't support redundant environments until recently, but
this code was written before that.  Since it has never been tested (and
currently causes a build failure), simply punt it.  If the functionality
is actually desired, it can be re-added once it has been tested.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The u-boot.lds CPP unification missed the Blackfin-specific clean target.
It is no longer needed, so punt it.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Support the new AD7160 eval board.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Some commands (like 'mii') use this name to select devices, but they break
when those names contain spaces.  So drop the space from the Blackfin EMAC
driver.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Acked-by: NHeiko Schocher <hs@denx.de>

The L1 regions of Core B are not directly accessible from Core A, so we
need to use DMA to get at them.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer
ones only have a National PHY (which lack a RX Error interrupt line).  So
in the board eth init code, dynamically detect what is hooked up to the MAC
and handle each accordingly.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Much of the local bf533-stamp.h header is unused, and the few bits that
are are only needed in one file.  So move the few used bits out and punt
all the rest.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

Rather than only support the pins dedicated as chip selects, utilize the
gpio framework to support any gpio pin.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>