Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Scott Wood <scottwood@freescale.com>

Commit 99bcad18 deleted ADCIOP and DASA_SIM board support
but missed to delete board/esd/adciop and board/esd/dasa_sim.
It also missed to add entries to doc/README.scrapyard.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: NStefan Roese <sr@denx.de>
Acked-by: NMatthias Fuchs <matthias.fuchs@esd.eu>

Describe removed date in the form of YYYY-MM-DD, not YYYY-DD-MM.
And wrong commit hash also should be fixed.
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: NMarek Vasut <marex@denx.de>

Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

We should move forward to remove the old board init code. Add a
prominent message to encourage maintainers to get started on this
work.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NTom Rini <trini@ti.com>

Add CONFIG_SYS_GENERIC_BOARD to use common/board_[fr].c for kzm9g.
Signed-off-by: NTetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does not read device at all. This patch prepares dummy buffer and read data into it.
Signed-off-by: NTetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: NHeiko Schocher <hs@denx.de>
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org>

Commit d016dc42 changed the layout of BCH8 SW
on omap3 boards. We need to adopt the ecc layout for the nand_spl_simle
driver to avoid wrong ecc errors.
Signed-off-by: NAndreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Signed-off-by: NAndreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Commit 89088058 introduced EEPROM parsing and
board detection but faild to return a valid tricorder_eeprom struct for backup
case.  When pressing S200 while reading EEPROM we ignore the value. We
returned falsely a tricorder_eeprom struct with uninitialized data which is
just garbage.
Initialize it by zeroing the whole structure.
Signed-off-by: NAndreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: NAndreas Bießmann <andreas.devel@googlemail.com>

During switch to device tree, commit 1ecab0f3 has removed this code.

INFORM4 and INFORM5 registers are used by TRATS2 first stage bootloader for
providing recovery. For normal operation, those two must be cleared out.

This error emerges when one force reset from u-boot's command line for
three times.
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: NMinkyu Kang <mk7.kang@samsung.com>

In some use cases, SPL linker script was not updated even when
it should be.

For instance,

  $ make tricoder_config all
    [ build complete ]
  ... modify include/configs/tricoder.h
  $ make

spl/u-boot-spl.lds should be updated in this case, but it wasn't.

To fix this problem, linker scripts generation should be handled
by $(call if_changed_dep,...) rather than by $(call if_changed,...).
Signed-off-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>
Reported-by: NAndreas Bießmann <andreas.devel@googlemail.com>
Tested-by: NAndreas Bießmann <andreas.devel@googlemail.com>

Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	include/configs/trats.h
	include/configs/trats2.h
	include/mmc.h

This patch add gicv3 support to uboot armv8 platform.

Changes for v2:
  - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
  - move smp_kick_all_cpus() from gic.S to start.S, it would be
    implementation dependent.
  - Each core initialize it's own ReDistributor instead of master
    initializeing all ReDistributors. This is advised by arnab.basu
    <arnab.basu@freescale.com>.
Signed-off-by: NDavid Feng <fenghua@phytium.com.cn>

The conditional is using a variable that is not defined.
Signed-off-by: NRommel G Custodio <sessyargc+u-boot@gmail.com>

When flush the d$ with set/way instruction, it need calculate the way's
offset = log2(Associativity); but in current uboot's code, it use below
formula to calculate the offset: log2(Associativity * 2 - 1), so finally
it cannot flush data cache properly.
Signed-off-by: NLeo Yan <leoy@marvell.com>

For ARMv8, U-boot has been running at EL3 with cache and MMU enabled.
Without proper setup for EL2, cache and MMU are both disabled (out of
reset). Before switching, we need to flush the dcache to make sure the
data is in the main memory.
Signed-off-by: NYork Sun <yorksun@freescale.com>
Acked-by: NDavid.Feng <fenghua@phytium.com.cn>

Get rid of double VF610_PAD_DDR_A15__DDR_A_15 iomux configuration.
Signed-off-by: NMarcel Ziswiler <marcel@ziswiler.com>

This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secondary Ethernet (enet1) MAC RMII1 base address definition
- RMII1 iomux definitions
- VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for
  internal (e.g. crystal-less) Ethernet clocking.
Signed-off-by: NMarcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: NStefan Agner <stefan@agner.ch>

Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux
definitions for UART0 (aka. SCI0).
Signed-off-by: NMarcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: NStefan Agner <stefan@agner.ch>

The anadig_reg structure started at the wrong offset (fixed by adding
reserved_0x000[4]), was missing some reserved field required for
alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl)
and further contained a too short reserved field causing further miss-
alignment (reserved_0x0C4[7]). Also, rename all the reserved fields
and using a memory offset based scheme for.

Discovered and tested by temporarily putting the following debug
instrumentation into board_init():
    struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR;
    printf("&anadig->pll3_ctrl=0x%p\n", &anadig->pll3_ctrl);
    printf("&anadig->pll5_ctrl=0x%p\n", &anadig->pll5_ctrl);
Signed-off-by: NMarcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: NStefan Agner <stefan@agner.ch>

After Kbuild introduction, the CROSS_COMPILE environment variable has been
set to some default value (prefix arm-linux-).

This shall be removed since it breaks building u-boot for native arm target
(like qemu ARM).
Moreover not all compilers have arm-linux- prefix.

Additionally the u-boot cross compiles with CROSS_COMPILE= set explicitly-
e.g.:
CROSS_COMPILE=/ .... /arm-v7a-linux-gnueabi- make
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: NMasahiro Yamada <yamada.m@jp.panasonic.com>

Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 794072 and 761320.
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>

Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>
Acked-by: NFabio Estevam <fabio.estevam@freescale.com>

A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: NNitin Garg <nitin.garg@freescale.com>
Acked-by: NDirk Behme <dirk.behme@de.bosch.com>

When SoC first boots up, we should invalidate the cache but not flush it.
We can use the same function for invalid and flush mostly, with a wrapper.

Invalidating large cache can ben slow on emulator, so we postpone doing
so until I-cache is enabled, and before enabling D-cache.
Signed-off-by: NYork Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>

If D-cache is enabled, we need to flush it, and invalidate i-cache before
jumping to the new location. This should be done right after relocation.
Signed-off-by: NYork Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>

Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with
sub-architecture.
Signed-off-by: NYork Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>

Avoids "could not find output section .gnu.hash" ld.bfd errors on openSUSE.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NSimon Glass <sjg@chromium.org>
Tested-by: NSimon Glass <sjg@chromium.org>

Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files
Signed-off-by: NChin Liang See <clsee@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: NPavel Machek <pavel@denx.de>

We've run into a non-trivial conversion to CONFIG_SYS_GENERIC_BOARD so
we'll postpone this notice until right after v2014.04 is out.

This reverts commit 36c4b1d9.
Signed-off-by: NTom Rini <trini@ti.com>

This patch adds the groundwork for generating signed BootStream, which
can be used by the HAB library in i.MX28. We are adding a new target,
u-boot-signed.sb , since the process for generating regular non-signed
BootStream is much easier. Moreover, the signed bootstream depends on
external _proprietary_ _binary-only_ tool from Freescale called 'cst',
which is available only under NDA.

To make things even uglier, the CST or HAB mandates a kind-of circular
dependency. The problem is, unlike the regular IVT, which is generated
by mxsimage, the IVT for signed boot must be generated by hand here due
to special demands of the CST. The U-Boot binary (or SPL binary) and IVT
are then signed by the CST as a one block. But here is the problem. The
size of the entire image (U-Boot, IVT, CST blocks) must be appended at
the end of IVT. But the size of the entire image is not known until the
CST has finished signing the U-Boot and IVT. We solve this by expecting
the CST block to be always 3904B (which it is in case two files, U-Boot
and the hand-made IVT, are signed in the CST block).
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>

Conflicts:
	arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
	arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: NStefano Babic <sbabic@denx.de>

This reverts commit 53e6b14e.

Patch does not merge anymore with u-boot-arm and must be rebased.
Signed-off-by: NStefano Babic <sbabic@denx.de>

This change enables automatically uuid generation by command gpt.
In case of updating partitions layout user don't need to care about
generate uuid manually.
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: trini@ti.com

Changes:
- randomly generate partition uuid if any is undefined and CONFIG_RAND_UUID
  is defined
- print debug info about set/unset/generated uuid
- update doc/README.gpt
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Acked-by: NLukasz Majewski <l.majewski@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>

Those commands basis on implementation of random UUID generator version 4
which is described in RFC4122. The same algorithm is used for generation
both ids but string representation is different as below.

char:  0        9    14   19   24         36
       xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx
UUID:     be     be   be   be       be
GUID:     le     le   le   be       be

Commands usage:
- uuid [<varname>]
- guid [<varname>]

The result is saved in environment as a "varname" variable if argument is given,
if not then it is printed.

New config:
- CONFIG_CMD_UUID
Signed-off-by: NPrzemyslaw Marczak <p.marczak@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: trini@ti.com