The default configuration for QSPI AHB bus can't support 16MB+.
But some flash on NXP layerscape board are more than 16MB.
Signed-off-by: NYuan Yao <yao.yuan@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Enable the errata-a005697 for ls1012a
Signed-off-by: NChangming Huang <jerry.huang@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Add the name for register space and memory space.
<0x1550000 0x10000 > is the QSPI register space.
<0x40000000 0x4000000> is the QSPI memory space.
Signed-off-by: NYuan Yao <yao.yuan@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

- add additional function erratum_a009942_check_cpo to check if the
  board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from
  fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
[YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500]
Reviewed-by: NYork Sun <york.sun@nxp.com>

Fix following warning in case multiple erratum macro was not defined.
warning: unused variable 'tmp'
warning: unused variable 'ddr_freq'
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This patch fixes the warnings about misaligned cache on Armada XP:

CACHE: Misaligned operation at range [7facb400, 7facb460]
Signed-off-by: NStefan Roese <sr@denx.de>

Not all memory is mapped in the MMU. So we need to restrict the memory
size so that U-Boot does not try to access it. Also, the internal
registers are located at 0xf000.0000 - 0xffff.ffff. Currently only 2GiB
are mapped for system memory. This is what we pass to the U-Boot
subsystem here.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

This patch adds PCI support to the Marvell Armada-8K devel board.
Additionally the Intel E1000 ethernet driver is enabled so that
network support is available on this board, even without the
internal network interfaces being supported (yet).
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

To use the PCIe driver, its controller memory and the PCIe regions need
to get mapped in the MMU. Otherwise these areas can't be accessed.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

This patch adds a driver for the PCIe controller integrated in the
Marvell Armada-8K SoC. This controller is based on the DesignWare
IP core.

The original version was written by Shadi and Yehuda. I ported this
driver to the latest mainline U-Boot version with DM support.

Tested on the Marvell DB-88F8040 Armada-8K eval board.
Signed-off-by: NShadi Ammouri <shadi@marvell.com>
Signed-off-by: NYehuda Yitschak <yehuday@marvell.com>
Signed-off-by: NStefan Roese <sr@denx.de>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

With the support for the Armada 8k, a 2nd COMPHY controller now needs
to get supported from the CP110 slave controller. This patch adds support
for this 2nd contoller in the COMPHY driver.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

The Armada8k implements 2 CPs (communication processors) and the 2nd
CP also is equipped with a COMPHY controller. This patch now loops
over all enabled MISC devices (CP110) enabled in the DT to initialize
all CPs.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

Add I2C and SPI aliases to enable usage in U-Boot. Otherwise U-Boot will
not be able to use the SPI NOR chip for environment storage and use
"i2c dev 0" to select this I2C bus.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

This patch adds the COMPHY device tree configuration to the DT file for
the Marvell DB-88F8040 devel board.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

This patch adds the COMPHY and UTMI device tree nodes to the cp110-slave
dtsi file for the Armada 8K.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

Since the cp110 slave also has comphy DT nodes, the names need to be
renamed to avoid a name clash. Lets use the common naming scheme:
"cpm_xxx" for master and "cps_xxx" for slave.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

This patch adds the necessary files to support the Marvell Armada 8k
devel board. Most board specfic files are shared with the Armada 7k
boards under the name "armada-8k*". So only minimal changes are
necessary to add this basic board support (except the DT files of
course).
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

To enable access to the slave CP its memory needs to be added to the
MMU memory map.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

This patch uses of_machine_is_compatible() to detect the board at runtime
and only configured the I2C IO expander for the xHCI power / reset on
the DB-88F7040 board. As this code will be used by other Armada-7k/8k
ports, its necessary to use this runtime detection here.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

Add the latest version of the DT files from the Linux kernel.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

This moves some of the Armada DB-88F7040 board specific files to a more
generic name: armada-8k. This is in preparation for the Armada-8k
support which will be added soon. And since both platforms share
most devices, lets also share most source files to not duplicate
the code here.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>

Commit 4c4e3b37("ARM: AM43xx: Enable FIT") accidentally disabled
DM_SPI and DM_SPI_FLASH. Add back DM_SPI and DM_SPI_FLASH to
am43xx_evm_defconfig in order to make use of DM framework for QSPI.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Acked-by: NLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: NMugunthan V N <mugunthanvnm@ti.com>

After an image is selected out of a FIT blob for further processing we
run an optional, platform specific, post-processing function on this
component. This post-processing may modify the position and size of the
image, so after post-processing we update the location and size for this
image in the FIT header. This can cause problems as the position of
subsequent components in the FIT blob are only referenced by relative
position to the end of the last component. When we resize or move a
component the following components position will be calculated
incorrectly. To fix this, we do not update the FIT header but instead
only update our local understanding of the image data. This also allows
us to re-run post-processing steps if needed.
Signed-off-by: NAndrew F. Davis <afd@ti.com>
Tested-by: NCarlos Hernandez <ceh@ti.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NLokesh Vutla <lokeshvutla@ti.com>

The shortname variable isn't referenced anywhere in the code, so just
remove it.

Pointed out by a GCC 6.2 default warning option.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NMarek Vasut <marex@denx.de>
Acked-by: NLukasz Majewski <l.majewski@samsung.com>

Apparently the indentation is wrong in this case, as the second message
should be printed indepdently of the if statement.

Fix this indentation to avoid both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>

Apparently the indentation is wrong here, fix this to avoid compiler
warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NMarek Vasut <marex@denx.de>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Obviously the mask for the rx and tx select field cannot be right,
as it would overlap in one and exceed the 32-bit register in the other
case. From looking at the neighbouring bits it looks like the mask
should be really 4 bits wide instead of 8.

Pointed out by a GCC 6.2 (default) warning.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NStefan Roese <sr@denx.de>
Reviewed-by: NStefan Roese <sr@denx.de>

The rtl8169_intr_mask variable isn't used anywhere in the code, so
just remove it to avoid a GCC 6.2 compiler warning.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Apparently the indentation is off here, for the IGB model just want to
bail out early.
Fix this to avoid both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

The indentation is misleading here and suggests that the write command
will be only executed in the else clause.
It seems like this is not intended, so fix the indentation to avoid
both compiler warnings and puzzled readers.

Pointed out by GCC 6.2's -Wmisleading-indentation warning.
Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
Reviewed-by: NStefan Roese <sr@denx.de>

This is not used by any boards. Drop it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NDavid Müller <d.mueller@elsoft.ch>
Reviewed-by: NJagan Teki <jagan@openedev.com>

This board has not been converted to DM_SERIAL by the deadline.
Remove it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NDavid Müller <d.mueller@elsoft.ch>
Reviewed-by: NJagan Teki <jagan@openedev.com>

This board has not been converted to DM_SERIAL by the deadline.
Remove it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NDavid Müller <d.mueller@elsoft.ch>

This driver was converted so we should remove it from the list.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Change 'date' to 'data'.
Signed-off-by: NTomas Melin <tomas.melin@vaisala.com>

Make spelling correction for 'from'
Signed-off-by: NWalt Feasel <waltfeasel@gmail.com>

Make comment style modifications
Signed-off-by: NWalt Feasel <waltfeasel@gmail.com>

Make checkpatch style modification for
WARNING: line over 80 characters
Signed-off-by: NWalt Feasel <waltfeasel@gmail.com>