At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This function is only used in one place. It is better to just declare it
internally since there is a simpler replacement for use outside the
driver-model core code.
Signed-off-by: NSimon Glass <sjg@chromium.org>

It is good practice to include common.h as the first header. This ensures
that required features like the DECLARE_GLOBAL_DATA_PTR macro,
configuration options and common types are available.

Fix up some files which currently don't do this. This is necessary because
driver model will soon start using global data and configuration in the
dm/read.h header file, included via dm.h. The gd->fdt_blob value will be
used to access the device tree and CONFIG options will be used to
determine whether to support inline functions in the header file.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This function should not be used outside the core driver-model code.
Update it to use dm_scan_fdt_dev() instead.
Signed-off-by: NSimon Glass <sjg@chromium.org>

These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Move this group of address-related functions into a new file. These use
the flat device tree. Future work will provide new versions of these which
can support the live tree.
Signed-off-by: NSimon Glass <sjg@chromium.org>

This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
Signed-off-by: NSimon Glass <sjg@chromium.org>

Please pull another update for Broadcom MIPS.
This contains new SoC's, new boards and new drivers and some bugfixes.

Mostly including the Armada 37xx pinctrl / gpio driver.

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way.  As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.
Signed-off-by: NDaniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
        migrate CRC32_VERIFY]
Signed-off-by: NTom Rini <trini@konsulko.com>

Instead of having a peripheral clock of 50 MHz like the BCM63xx family, it
has a 48 MHz clock.
This fixes uart baud rate calculation for BCM3380.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>

Now that the uart driver has been fixed we support more baud rates.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>

It's currently bugged and doesn't work for even cases.
Right shift bits instead of dividing and fix even cases.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>

I missed this when I added support for BMIPS UART driver and it's needed to
achieve a real 115200 8N1 setup.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

BCM6338 has a fixed CPU frequency of 240 MHz.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

As far as I know BCM3380 has a fixed CPU frequency since I couldn't find its
PLL registers in any documentation.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This is done in order to reuse ram size calculation for BCM6338/BCM6348
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Use a generic name for cpu_desc functions instead of using a specific SoC one.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

Add a new sysreset driver that uses the recently added watchdog support.
It performs a full SoC reset by calling wdt_expire_now op.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver controls the watchdog present on this SoC.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver controls the watchdog present on this SoC.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver controls the watchdog present on this SoC.
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

This driver is a simplified version of linux/drivers/watchdog/bcm63xx_wdt.c
Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>

image_version_file()'s only use is to return the version number of the
specified image, and it's only called by kwbimage_generate().  This
version function mallocs "image_cfg" and reads the contents of the image
into that buffer.  Before return to its caller it frees the buffer.

After extracting the version, kwb_image_generate() tries to calculate
the header size by calling image_headersz_v1().  This function now
accesses "image_cfg", which has already been freed.

Since image_version_file() is only used by a single function, inline it
into kwbimage_generate() and only free the buffer after it is no longer
needed.  This also improves code readability since the code is mostly
equal to kwbimage_set_header().
Signed-off-by: NPatrick Wildt <patrick@blueri.se>
Signed-off-by: NStefan Roese <sr@denx.de>

Switch Clearfog to the generic distro defaults.  This has been taken
from a Debian mailing list thread:

https://lists.debian.org/debian-boot/2016/10/msg00026.htmlSigned-off-by: NPatrick Wildt <patrick@blueri.se>
Signed-off-by: NStefan Roese <sr@denx.de>

Use GPIO19 which is wired to the uSOM phy reset signal in order to reset
the uSOM's 1512 Gigabit Ethernet phy.

This GPIO is valid on ClearFog rev 2.1 and newer.

Taken from SolidRun's specialised u-boot, see
https://github.com/SolidRun/u-boot-armada38x/commit/f906e3df172e07ac82cdd87b278d7896949262eaSigned-off-by: NPatrick Wildt <patrick@blueri.se>
Signed-off-by: NStefan Roese <sr@denx.de>

The dram_init and dram_init_banksize functions were using a board
specific implementation for decoding the memory banks from the fdt.
This change makes the dram_init* functions use a generic implementation
of decoding and populating memory bank and size data.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: NStefan Roese <sr@denx.de>

This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting
the correct PHY type (KR / SFI) for the COMPHY driver and enabling the
ethernet0 device node in the dts.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>