Move this option to Kconfig and clean up existing uses.
Signed-off-by: NYork Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NTom Rini <trini@konsulko.com>

LS1046AQDS Specification:
-------------------------
Memory subsystem:
 * 8GByte DDR4 SDRAM (64bit bus)
 * 128 Mbyte NOR flash single-chip memory
 * 512 Mbyte NAND flash
 * 64 Mbyte high-speed SPI flash
 * SD connector to interface with the SD memory card

Ethernet:
 * Two XFI 10G ports
 * Two SGMII ports
 * Two RGMII ports

PCIe: supports Gen 1 and Gen 2

SATA 3.0: one SATA 3.0 port

USB 3.0: two micro AB connector and one type A connector

UART: supports two UARTs up to 115200 bps for console
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: NMingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

LS1046ARDB Specification:
-------------------------
Memory subsystem:
 * 8GByte DDR4 SDRAM (64bit bus)
 * 512 Mbyte NAND flash
 * Two 64 Mbyte high-speed SPI flash
 * SD connector to interface with the SD memory card
 * On-board 4G eMMC

Ethernet:
 * Two XFI 10G ports
 * Two SGMII ports
 * Two RGMII ports

PCIe:
 * PCIe1 (SerDes2 Lane0) to miniPCIe slot
 * PCIe2 (SerDes2 Lane1) to x2 PCIe slot
 * PCIe3 (SerDes2 Lane2) to x4 PCIe slot

SATA:
 * SerDes2 Lane3 to SATA port

USB 3.0: one super speed USB 3.0 type A port
	 one Micro-AB port

UART: supports two UARTs up to 115200 bps for console
Signed-off-by: NMingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This is a workaround to fix SATA CRC error. Once the root cause
is found the ECC disabling will be removed.
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Enable ERRATUM_A008511, ERRATUM_A009801, ERRATUM_A009803,
ERRATUM_A009942, ERRATUM_A010165
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

As per the top level U-Boot README "Board Initialisation Flow"
section, board_init_f() should return without calling board_init_r()
directly. Clearing BSS and calling board_init_r() will be done in
crt0_64.S.
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The CONFIG_STANDALONE_LOAD_ADDR is set to 0x80300000 by default.
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

According to design specification, the L2 cache operates at the same
frequency as the A72 CPUs in the cluster with a 3-cycle latency, so
increase the L2 Data RAM and Tag RAM latency to 3 cycles, or else,
will run into different call trace issues.
Signed-off-by: NMingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The 'commit 95279315 ("board/ls2085rdb: Export functions for
standalone AQ FW load apps")' mentioned memset was exported but
it was not, this patch exports the memset.
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

When CONFIG_SYS_FSL_ERRATUM_A009801 is defined but
CONFIG_SYS_FSL_ERRATUM_A008511 not defined, there is compile error
that temp32 undeclared, this patch fixes it.
Signed-off-by: NShaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This general MMDC driver adds basic support for Freescale MMDC
(Multi Mode DDR Controller). Currently MMDC is integrated on ARMv8
LS1012A SoC for DDR3L, there will be a update to this driver to
support more flexible configuration if new features (DDR4, multiple
controllers/chip selections, etc) are implimented in future.

Meantime, reuse common MMDC driver for LS1012ARDB/LS1012AQDS/
LS1012AFRDM.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The deep sleep function of LS1 platform, is mapped into PSCI system
suspend function, this patch adds implementation of it.
Signed-off-by: NHongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The EPU Finite State Machie (FSM) is used in both the last stage of
system suspend and the earliest stage of system resume.
Signed-off-by: NHongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

This patch adds definitions of all the regesters necessary for
system sleep.
Signed-off-by: NHongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The v7_flush_dcache_all function will be called by ls102xa platform system
suspend, it is necessary to make it a public call instead of a local one, but
changing the LENTRY to ENTRY isn't enough, because there is another one using
the same name, so this one gets a psci_ prefix.
Signed-off-by: NHongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Debug server feature has been dropped from roadmap.
Signed-off-by: NYork Sun <york.sun@nxp.com>

As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Add this API to make the individual device is able to be set to
the specified permission.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Move forward the basic non-secure access enable operation, so the
subsequent individual device access permission can override it.
And collect the dispersed callers in board level, and then move
them to SoC level.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Up to now, the function is_serdes_configed() doesn't check if the map
of serdes protocol is initialized before accessing it. The function
is_serdes_configed() will get wrong result when it was called before
the serdes protocol maps initialized. As the first element of the map
isn't used for any device, so use it as the flag to indicate if the
map has been initialized.
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

As part of Secure Boot Chain of trust, PPA image must be validated
before the image is started.
The code for the same has been added.
Signed-off-by: NAneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: NSumit Garg <sumit.garg@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

sec_init() which was earlier called in misc_init_r()
is now done in board_init() before PPA init as SEC
block will be used during PPA image validation.
Signed-off-by: NAneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: NSumit Garg <sumit.garg@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

DDR controller 5.2.1 has this erratum A008511 partially fixed.
The workaround needs to be adjusted to take advantage of Vref
training. This patch enables the training and force output
enable to be off.

Erratum A009803 requires the controller to be idel before enabling
address parity. It was combined with workaround for A008511. With
new A008511 flow, this flow needs to be changed to enabling
data init (D_INIT) after the address parity is enabled.
Signed-off-by: NYork Sun <york.sun@nxp.com>
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>

32 more debug registers are added for newer DDR controllers.
Signed-off-by: NYork Sun <york.sun@nxp.com>
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>

DDR erratum A008336 only applies to DDR controller v5.2.0.
DDR controller v5.2.1 already has default 0x43b30002 in
EDDRTQCR1 register for optimal performance.
Signed-off-by: NShengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

The current code would always use the speed and mode set by
CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE. But if using
SPI driver model it should get the values from DT.
Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: NJagan Teki <jteki@openedev.com>
Reviewed-by: NJoe Hershberger <joe.hershberger@ni.com>
Reviewed-by: NYork Sun <york.sun@nxp.com>

Signed-off-by: NTom Rini <trini@konsulko.com>

This patch fixes the "sf probe" command. The very first SPI flash probe
passes, for instance when u-boot tries to read its environment settings
from a (Q)SPI memory but next "sf probe" commands fail because the flash
memory node is unbound from the SPI controller children nodes.
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Tested-by: NStefan Roese <sr@denx.de>
Tested-by: NHannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: NSimon Glass <sjg@chromium.org>

move VERSION_VARIABLE from board config file into a
Kconfig option.
Signed-off-by: NHeiko Schocher <hs@denx.de>

We only need the function found in cmd/disk.c when we have IDE, SCSI or
USB_STORAGE enabled.  While the first two are easy to get right, in the
3rd case we assume that the set of cases where we do have USB and do not
enable USB_STORAGE are small enough that we can take the small bloat of
un-discarded strings on gcc prior to 6.x
Signed-off-by: NTom Rini <trini@konsulko.com>

In some cases we were missing CONFIG_USB=y so enable that when needed.
Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NTom Rini <trini@konsulko.com>

A previous patch (net: asix: fix operation without eeprom) added a
two-byte shift to the packet buffer when receiving a packet on the
AX88772B.

This shift was not included when the driver was updated to work with
DriverModel. Testing on a Marvell DB-88F6820-ACM showed that the adapter
was not functioning correctly (EHCI timeouts).

This patch brings the two-byte shift to the DriverModel implementation
of ops->recv (asix_eth_recv).

Testing on the same board, we were able to TFTP a file over and confirm
that the crc32 was correct.
Signed-off-by: NJoshua Scott <joshua.scott@alliedtelesis.co.nz>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

This reverts commit 6279b49e.

This caused a bad data crc.
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
Reported-by: NGuillaume GARDET <guillaume.gardet@free.fr>

This reverts commit 998372b4.

This caused a data abort on some platform.
Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com>
Reported-by: NGuillaume GARDET <guillaume.gardet@free.fr>

Signed-off-by: NTom Rini <trini@konsulko.com>

Update the README to add support for K2G EVM. Also
- Add steps on how to use MMC boot
- Fix load address when using CCS
- Update build target to u-boot.bin from u-boot-dtb.bin as all ks2
  platforms uses DT.
Reviewed-by: NTom Rini <trini@konsulko.com>
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>