The board header file included a reference to the starting point
from nitrogen6x.h, but since so much changed, the file bears
little resemblance to that file.
Signed-off-by: NEric Nelson <eric@nelint.com>

The initial implementation of mx6memcal reset the CPU after
running the memory calibration procedure because the generic
board has no information about which boot devices are available.

Now that we have SDP support in SPL, use it to allow a full
U-Boot to be uploaded (i.e. to use "mtest").
Signed-off-by: NEric Nelson <eric@nelint.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

This patch just changes the order of configuration items in
mx6memcal_defconfig to match the Kconfig layout, making it easier
to track changes made using menuconfig.
Signed-off-by: NEric Nelson <eric@nelint.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c
Signed-off-by: NPatrick Bruenn <p.bruenn@beckhoff.com>

Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c
Signed-off-by: NPatrick Bruenn <p.bruenn@beckhoff.com>

Move dram_init(), dram_init_banksize() and get_effective_memsize() to
arch/arm/mach-imx/mx5/mx53_dram.c, where it can be reused by m53evk and
mx53loco.
Signed-off-by: NPatrick Bruenn <p.bruenn@beckhoff.com>

Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

However multiple calls are better than undefined behavior...
This fixes:
https://lists.denx.de/pipermail/u-boot/2017-November/313214.html
https://lists.denx.de/pipermail/u-boot/2017-December/314480.htmlSigned-off-by: NPatrick Bruenn <p.bruenn@beckhoff.com>

Validate the time at startup:
 - in case rtc error add to kernel command line RTC_ERROR
 - clamp date to 1-Jan-2036
Signed-off-by: NNandor Han <nandor.han@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

The exact definition of a successful boot is defined by user-space.
Determine the boot partition automatically.  A partition is selected if
file `/boot/bootcause/firstboot' exists (meaning that the partition has
freshly installed software) OR if file `/boot/fitImage' exists.

When userspace determines that new software was successfully installed,
it must (1) delete `/boot/fitImage' on the _inactive_ partition and (2)
remove `/boot/bootcause/firstboot'.

Enable video, but do not display logos or other version information.
Silence kernel console logging by default.

Print a message to VGA screen in case of boot failure and reset bootcount
to allow the user to attempt boot again.
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Change the kernel command line to mount the root filesystem read-only in
order to be able to run filesystem check on it on boot.
Signed-off-by: NHannu Lounento <hannu.lounento@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Enable bootcount using an EXT file.
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Read boot script from shared partition, if available.
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Enable the hardware watchdog on bx50v3 to cause it to reset in the event
the board hangs.

Configure GPIO_9 pin as WDOG1_B so that a watchdog timeout results in a
full system reset.

The watchdog is used and reconfigured by systemd approximately 1.7 seconds
into boot. Adding a few seconds for U-Boot and a few more seconds as a
safety margin.

Note that the PCIe controller is _not_ put back into a safe state prior
to board reset.  This is a problem if board reset is implemented as CPU
reset.
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

There are two I210s on the b850v3 and one on the b450v3 and b650v3.
One is connected to Marvell 88e6240 which is already programmed.

Follow the flow documented in doc/README.enetaddr: set the
enet[0-9]*addr environment variable and let the driver program the
hardware.

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order.

The environment variables are removed after programming the hardware
because the variables seem to influence MAC addresses also after U-Boot.
Specifically the MAC address of FEC (MC interface) would be incorrectly
set: 'ethaddr', which maps to the first I210 chip and is set to I210's
default address read from the driver by eth_write_hwaddr in eth_legacy.c
because the variable is undefined (not set even by bx50v3.c), would
result in the eth0 interface's MAC address to be set to I210's default
address.
Signed-off-by: NHannu Lounento <hannu.lounento@ge.com>
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.

This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.

The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.
Signed-off-by: NHannu Lounento <hannu.lounento@ge.com>
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Modify b450v3, b650v3 and b850v3 defconfigs to enable the network devices
found in these products.
Signed-off-by: NIan Ray <ian.ray@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.

Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Add a new driver for RX8010SJ rtc chip. The driver implements both
formats of U-Boot driver model.
Signed-off-by: NNandor Han <nandor.han@ge.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Implement programming MAC address to the hardware, i.e. external flash
seen as EEPROM.

MAC address is only written if it differs from what is already stored in
flash or if reading the current MAC address fails.
Signed-off-by: NHannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.

This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.
Signed-off-by: NHannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Port functions for writing to EEPROM, updating the checksum and
committing data to flash from the Linux kernel igb driver.

Functions were ported from Linux 4.8-rc2 (694d0d0bb20).
Signed-off-by: NHannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NMartyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>

Add ddrc memory map and enum types used in ddr initialization.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Allow the dm driver be omitted by SPL.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NSimon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>

Add dtsi file for i.MX8MQ.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.
Signed-off-by: NYe Li <ye.li@nxp.com>
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Add i.MX8M GPIO support.
There are 4 GPIO banks on i.MX8M.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Include i.MX8M in lcdif register layout map.
Also included i.MX7ULP in this patch, since share same with i.MX8M.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

Support i.MX8M in fsl esdhc driver.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks
and each bank 4 words.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>

Compile files for i.MX8M
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

Add SoC level initialization code
 - arch_cpu_init
 - mmu table
 - detect cpu revision
 - reset cpu and wdog settings
 - timer init
 - wdog settings
 - lowlevel init to save/restore registers
 - a few dummy header file to avoid build failure
 - ft_system_setup
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>

The mx7 mmc env code is shared by i.MX8M, so move it to mmc_env.c.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Enable get_boot_device for i.MX8M, it supports boot type USB.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Move get_boot_device to cpu.c to prepare adding i.MX8M support,
because i.MX8M share same code with i.MX7.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Add i.MX8M support. Because i.MX8M use SiP call trap
to Arm Trusted Firmware to handle M4, so use #ifdef
to avoid build error on i.MX6/7.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>

Move i.MX6/7 bootaux code to imx_bootaux.c.
The i.MX6/7 has different src layout, so define M4 reg offset
to ease the cleanup. Redefine the M4 related BIT for share
common code.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>

Move imx_get_mac_from_fuse to a new mac.c for i.MX6/7.
Since fuse regs structure are different for i.MX6/7, use mac
address offset in code and define a new local struture
imx_mac_fuse.

Also sort the config order.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>

Use more general enum types for speed grade.
Refine get_cpu_speed_grade_hz to support i.MX8M.
Signed-off-by: NPeng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: NStefano Babic <sbabic@denx.de>