In 16 bpp mode, the new IPEK01 board only requires swapping of D16 words
for D32 accesses due to the diffferent connecting to the GDC bus. This
patch introduces the configuration option VIDEO_FB_16BPP_WORD_SWAP,
which should be set for all board using the mb862xx in 16 bpp mode. For
the IPEK01, VIDEO_FB_16BPP_PIXEL_SWAP should not be set.
Signed-off-by: NWolfgang Grandegger <wg@denx.de>

The new IPEK01 board can use the 32 bpp mode for the Lime graphics
controller. For this mode, video accelaration does not work. This patch
makes the accelaration configurable via CONFIG_VIDEO_MB862xx_ACCEL,
which is enabled for the lwmon5 and the socrates board for backward
compatibility.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NWolfgang Grandegger <wg@denx.de>

To avoid board-specific code accessing the mb862xx registers directly,
the public function mb862xx_probe() has been introduced. Furthermore,
the "Change of Clock Frequency" and "Set Memory I/F Mode" registers
are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR,
respectively. The BSPs for the socrates and lwmon5 boards have been
adapted accordingly.
Signed-off-by: NWolfgang Grandegger <wg@denx.de>

Signed-off-by: NValentin Yakovenkov <yakovenkov@niistt.ru>
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

While we're here, improve the speed calculation a bit to match the HRM.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The current transfer code relies on ctrlc() to abort transfers, but this
requires user interactivity.  Naturalize the process with a timeout.
Signed-off-by: NMike Frysinger <vapier@gentoo.org>

The patch fixes a compilation warning by defining
CONFIG_SYS_64BIT_VSPRINTF in the config file
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

The patch fixes a compilation warning by defining
CONFIG_SYS_64BIT_VSPRINTF in the config file
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>

Extend bootdelay to 10 seconds.  Set boot retry time to 120 seconds and use
reset to retry.  Define default bootcommand and bootargs for production.
Signed-off-by: NEric Millbrandt <emillbrandt@dekaresearch.com>

Currently the CFI driver issues both AMD and Intel reset commands.
This is because the driver doesn't know yet which chips are connected.
This dual reset seems to cause problems with the M29W128G chips as
reported by Richard Retanubun. This patch now introduces a weak default
function for the CFI reset command, still with both resets. This can
be overridden by a board specific version if necessary.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Richard Retanubun <RichardRetanubun@ruggedcom.com>

Signed-off-by: NWolfgang Denk <wd@denx.de>

The editenv command can be used to edit an environment variable.
Editing an environment variable is useful when one wants to tweak an
existing variable, for example fix a typo or change the baudrate in the
'bootargs' environment variable.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

Previously setenv() would only delete an environment variable if it
was passed a NULL string pointer as a value.  It should also delete an
environment variable when it encounters a valid string pointer of
0-length.

This change/fix is generally useful and is necessary for the upcoming
"editenv" command.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

If the 'buf' parameter is a non-0-length string, its contents will be
edited.  Previously, the initial contents of 'buf' were ignored and the
user entered its contents from scratch.

This change is necessary to support the upcoming "editenv" command but
could also be used for future commands which require a user to modify
an existing string.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

Previously, passing readline() or readline_into_buffer() a NULL 'prompt'
parameter would result in puts() printing garbage when
CONFIG_CMDLINE_EDITING was enabled.

Note that no board currently triggers this bug.  Enabling
CONFIG_CMDLINE_EDITING on some boards (eg bab7xx) would result in
the bug appearing.  This change is only intended to prevent someone
from running into this issue in the future.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>

Add missing newline.
Signed-off-by: NWolfgang Denk <wd@denx.de>
Cc: Luigi Mantellini <luigi.mantellini@idf-hit.com>
Cc: Ben Warren <biggerbadderben@gmail.com>

Breaks building on many boards, and no really clean fix available yet.

This reverts commit 6dab6add.

Setup QE pin multiplexing for USB function, configure needed BCSRs
and add some fdt fixups.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

To make QE UART usable by Linux we should setup pin multiplexing
and turn UCC2 Ethernet node into UCC2 QE UART node.

Also, QE UART is mutually exclusive with UART0, so we can't enable
it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype
board with eSDHC in 1- or 4-bits mode.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

SPI Flash (M25P40) is connected to the SPI1 bus, we need a few
qe_iop entries to actually enable SPI1 on these boards.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch sets memory window for Serial RapidIO on MPC8569E-MDS
boards.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Simply add some defines, and adjust TLBe setup to include some
space for eLBC NAND.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2
(in 1-bit mode). When eSDHC is used, we should switch u-boot console to
UART1, and make the proper device-tree fixups.

Because of an erratum in prototype boards it is impossible to use eSDHC
without disabling UART0 (which makes it quite easy to 'brick' the board
by simply issung 'setenv hwconfig esdhc', and not able to interact with
U-Boot anylonger).

So, but default we assume that the board is a prototype, which is a most
safe assumption. There is no way to determine board revision from a
register, so we use hwconfig.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This change has 3 goals:
- Have secondary cores be released into spin loops at their 'true'
  address in SDRAM.  Previously, secondary cores were put into spin
  loops in the 0xfffffxxx address range which required that boot page
  translation was always enabled while cores were in their spin loops.

- Allow the TLB window that the primary core uses to access the
  secondary cores boot page to be placed at any address.  Previously, a
  TLB window at 0xfffff000 was always used to access the seconary cores'
  boot page.  This TLB address requirement overlapped with other
  peripherals on some boards (eg XPedite5370).  By default, the boot
  page TLB will still use the 0xfffffxxx address range, but this can be
  overridden on a board-by-board basis by defining a custom
  CONFIG_BPTR_VIRT_ADDR.  Note that the TLB used to map the boot page
  remains in use while U-Boot executes.  Previously it was only
  temporarily used, then restored to its initial value.

- Allow Boot Page Translation to be disabled on bootup.  Previously,
  Boot Page Translation was always left enabled after secondary cores
  were brought out of reset.  This caused the 0xfffffxxx address range
  to somewhat "magically" be translated to an address in SDRAM.  Some
  boards may not want this oddity in their memory map, so defining
  CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after
  the secondary cores are initialized.

These changes are only applicable to 85xx boards with CONFIG_MP defined.
Signed-off-by: NPeter Tyser <ptyser@xes-inc.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Originally written by Jason Jin and Mingkai Hu for mpc8536.

When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0

* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change
Signed-off-by: NVivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The data being modified was in NOR flash which caused the crash.
Signed-off-by: NPoonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NSergey Mironov <ierton@gmail.com>
Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com>

Currently fdt_fixup_stdout() is using hard-coded CONFIG_CONS_INDEX
constant. With multi-serial support, the CONS_INDEX may no longer
represent actual console, so we should try to extract port number
from the current stdio device name instead of always hard-coding the
constant value.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: NGerald Van Baren <vanbaren@cideas.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

U-Boot crashed on the last instruction:

int parse_stream_outer(struct in_str *inp, int flag)
{
effa4784:       94 21 ff 38     stwu    r1,-200(r1)
effa4788:       7c 08 02 a6     mflr    r0
effa478c:       42 9f 00 05     bcl-    20,4*cr7+so,effa4790 <parse_stream_outer+0xc>
effa4790:       7d 80 00 26     mfcr    r12
effa4794:       13 c1 b3 21     evstdd  r30,176(r1)

...which is a  SPE instruction, although -mno-spe was used.

tmp/cross/ppce500v2/bin/powerpc-angstrom-linux-gnuspe-gcc --version
powerpc-angstrom-linux-gnuspe-gcc (GCC) 4.3.3

Seems to be a known issue (since 2008-04?!)

Googled some, turns out this patch/workaround works for me on MPC8536DS.

See http://gcc.gnu.org/ml/gcc-patches/2008-04/msg00311.html for more info
Signed-off-by: NLeon Woestenberg <leon@sidebranch.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

According the user manual, we need loop-check the L2 enable bit set.
Signed-off-by: NDave Liu <daveliu@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

nand_boot.c: In function 'board_init_f':
nand_boot.c:44: warning: 'sys_clk' may be used uninitialized in this function
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

We need to source files to exist in the O=<FOO> nand_spl dir when
we build out of tree.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

These files were autogenerated by EPSON configuration tools.
This patch replaces the autogenerated file headers by the GPL
license notice.

This change is done with the explicit permission
of Epson Research & Development / IC Software Development.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd.eu>