This patch enables NAND support on the Marvell Armada XP
DB-MV784MP-GP eval board.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Peter Morrow <peter@senient.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>

Cloned from the Linux driver v4.2.0-rc2. Plus some patches from
Antoine Tenart enabling controller initialization and ONFI timing
support:

http://lists.infradead.org/pipermail/linux-mtd/2015-July/060197.html

Please note that this driver needs the Linux NAND subsystem sync to v4.1
from Scott to be applied:

https://www.mail-archive.com/u-boot@lists.denx.de/msg175762.html

Otherwise it will not compile.

Tested on the Marvell Armada XP DB-MV784MP-GP eval board.
Signed-off-by: NStefan Roese <sr@denx.de>
Cc: Antoine Tenart <antoine.tenart@free-electrons.com>
Cc: Ezeguil Garcia <ezequiel.garcia@free-electrons.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Scott Wood <scottwood@freescale.com>

Increase max sizes for OOB, Page size and eccpos to
suit for Micron MT29F32G08 part
Signed-off-by: NSiva Durga Prasad Paladugu <sivadur@xilinx.com>

Update the NAND code to match Linux v4.1.  The previous sync was
from Linux v3.15 in commit 4e67c571.

CONFIG_SYS_NAND_RESET_CNT is removed, as the upstream Linux code now
has its own timeout.  Plus, CONFIG_SYS_NAND_RESET_CNT was undocumented
and not selected by any board.
Signed-off-by: NScott Wood <scottwood@freescale.com>

In addition to mtd_block_isbad(), which checks if a block is bad or
reserved, it's needed to check if a block is reserved only (but not
bad). This commit adds an MTD interface for it, in a similar fashion to
mtd_block_isbad().

While here, fix mtd_block_isbad() so the out-of-bounds checking is done
before the callback check.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NPekon Gupta <pekon@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
[scottwood: Cherry-picked from Linux 8471bb73ba10ed67]
Signed-off-by: NScott Wood <scottwood@freescale.com>

I didn't approve the patch that added them.  Get them out of the way
before doing a sync.
Signed-off-by: NScott Wood <scottwood@freescale.com>

Conflicts:
	configs/socfpga_arria5_defconfig
	configs/socfpga_cyclone5_defconfig
	configs/socfpga_socrates_defconfig

Merged these by hand and re-ran savedefconfig on them.
Signed-off-by: NTom Rini <trini@konsulko.com>

Pull out the ArriaV SoCDK clock config from ancient Altera U-Boot
"rel_socfpga_v2013.01.01_15.05.01_pr" and implant those values into
mainline to get a booting ArriaV SoCDK.
Signed-off-by: NMarek Vasut <marex@denx.de>

Synchronise the config options with Cyclone V SoCDK and other boards.
This enables ethernet on the ArriaV SoCDK.
Signed-off-by: NMarek Vasut <marex@denx.de>

Add the missing DT nodes, so that ArriaV SoCDK can boot from SD
card. The SD card must be in slot J5 and BSEL must be 0x5.
Signed-off-by: NMarek Vasut <marex@denx.de>

Repair the maintainer entries so they match the current state of code.
Signed-off-by: NMarek Vasut <marex@denx.de>

Enable the DWAPB GPIO driver for SoCFPGA Cyclone V and Arria V.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

Add "bank-name" property to each GPIO bank to give it unique name.
The approach here is exactly the same as with the "regulator-name"
property for regulators.
Signed-off-by: NMarek Vasut <marex@denx.de>

Add driver for the DesignWare APB GPIO IP block.
This driver is DM capable and probes from DT.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>

Now that we're actually converting the QTS-generated header files,
we can even adjust their data types. A good candidate for this is
the pinmux table, where each entry can have value in the range of
0..3, but each element is declared as unsigned long. By changing
the type to u8, we can save over 600 Bytes from the SPL, so do it.
This patch also constifies the array.
Signed-off-by: NMarek Vasut <marex@denx.de>

Signed-off-by: NMarek Vasut <marex@denx.de>

Add script which loads the QTS-generated sources and headers and converts
them into sensible format which can be used with much more easy in mainline
U-Boot. The script also filters out macros which makes no sense anymore, so
they don't pollute namespace and waste space.
Signed-off-by: NMarek Vasut <marex@denx.de>

Just remove the ArriaV specific parts from the CycloneV SoCDK board
and they are no longer needed now.
Signed-off-by: NMarek Vasut <marex@denx.de>

Just remove the CycloneV specific parts from the ArriaV SoCDK board
and they are no longer needed now.
Signed-off-by: NMarek Vasut <marex@denx.de>

The board/altera/socfpga directory is not a generic SoCFPGA machine
anymore, but instead it represents the Altera SoCDK board. To make
matters more complicated, it represents both CycloneV and ArriaV
variant.

On the other hand, nowadays, the content of this board directory is
mostly comprised of QTS-generated header files, while all the generic
code is in arch/arm/mach-socfpga already.

Thus, this patch splits the board/altera/socfpga into a separate
board directory for ArriaV SoCDK and CycloneV SoCDK, so that each
can be populated with the correct QTS-generated header files for
that particular board.
Signed-off-by: NMarek Vasut <marex@denx.de>

The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
selected both a board and a CPU. This is not correct as these macros
are supposed to select only board.

All would be good, if QTS-generated header files didn't check for
these macros exactly to determine if the platform is Cyclone V or
Arria V. Thus, for the sake of compatibility with not well fleshed
out header file generator, this patch makes these two macros into
a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
previous stub config option.

The result is that compatibility with QTS is preserved and the new
CONFIG_TARGET_* select actual target boards.
Signed-off-by: NMarek Vasut <marex@denx.de>

Move the wrappers for QTS-generated files into platform directory
out of the board directory. The trick here is to add -I to CFLAGS
such that it points to the board directory in source tree and thus
the qts/ directory there is still reachable.
Signed-off-by: NMarek Vasut <marex@denx.de>

The GMAC which is enabled is purely board property, so do not enable
arbitrary GMAC in DT include files. Same goes for PHY mode, which is
again a board property. The CycloneV SoCDK does this correctly, but
SoCrates doesn't. This bug never manifested itself though, since all
the boards ever used the GMAC1 . This bug manifests itself only on
boards that utilise GMAC0.
Signed-off-by: NMarek Vasut <marex@denx.de>

The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node.
This makes aliases not very usable, so make everything into mmc0.
Moreover, zap the useless mmc alias while at this.
Signed-off-by: NMarek Vasut <marex@denx.de>

This code claims it needs to wait 7us, yet it uses get_timer() function
which operates with millisecond granularity. Use timer_get_us() instead,
which operates with microsecond granularity.
Signed-off-by: NMarek Vasut <marex@denx.de>

Based on observation, this udelay(20) was apparently too high and caused
subsequent failure to calibrate DDR when U-Boot was compiled with certain
toolchains. Lowering this delay fixed the problem.

Instead of permanently lowering the delay, calculate the correct delay
based on the original comment, that is, obtain EOSC1 frequency and use
it to calculate the precise delay.
Signed-off-by: NMarek Vasut <marex@denx.de>

Fix the following problem:
drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full':
drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be used uninitialized in this function [-Wmaybe-uninitialized]
  if (found_passing_read && found_failing_read)
                         ^
drivers/ddr/altera/sequencer.c:1803:26: note: 'found_failing_read' was declared here
  u32 found_passing_read, found_failing_read, initial_failing_dtap;
                          ^
Signed-off-by: NMarek Vasut <marex@denx.de>

This gem is really really rare, there was an actual float used in
the Altera DDR init code, which pulled in floating point ops from
the libgcc, just wow.

Since we don't support floating point operations the same way Linux
does not support them, replace this with an integer multiplication
and division combo. This removes some 2kiB of size from the SPL as
the floating point ops are no longer pulled in from libgcc.

This was detected by enabling CONFIG_USE_PRIVATE_LIBGCC=y , which
does not contain the floating point bits.
Signed-off-by: NMarek Vasut <marex@denx.de>

Move config for the E1000 Ethernet driver to Kconfig and tidy up affected
boards.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Several files are out of order. This means that when the moveconfig tool
moves CONFIG options to Kconfig it generates a large diff. To avoid this,
reorder the files first.
Signed-off-by: NSimon Glass <sjg@chromium.org>

Add Kconfig options in preparation for moving boards to use Kconfig.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Update this driver to support driver model.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Tested-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Apalis T30 2GB on Apalis Evaluation Board

Since struct eth_device does not exist with CONFIG_DM_ETH defined, avoid
using it in the driver unless necessary. Most of the time it is better to
pass the private driver pointer anyway.

Also refactor the code so that code that the driver model implementation
will share are available in functions that can be called. Add stubs where
necessary.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Tested-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Apalis T30 2GB on Apalis Evaluation Board

We cannot currently include any header files in the C files since common.h
needs to be included first, and it is in the header file. Move it.
Signed-off-by: NSimon Glass <sjg@chromium.org>
Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
Tested-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Apalis T30 2GB on Apalis Evaluation Board

Current behavior is that if CTRL+C is pressed command returns 0 that was
successful which is not correct behavior.
The easiest test case is "tftpboot 80000 uImage && echo yes"
and press CTRL+C. Then the second command is called which is incorrect.

Error log:
zynq-uboot> tftpb 80000 uImage && echo yes
Gem.e000b000:7 is connected to Gem.e000b000.  Reconnecting to
Gem.e000b000
Gem.e000b000 Waiting for PHY auto negotiation to complete....... done
Using Gem.e000b000 device
TFTP from server 192.168.0.102; our IP address is 192.168.0.101
Filename 'uImage'.
Load address: 0x80000
Loading: ################
Abort
yes
zynq-uboot>

This patch adds -EINTR return value when CTRL+C is pressed.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Reviewed-by: NTom Rini <trini@konsulko.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

High 32-bit address is needed when u-boot runs in 64-bit space.
Tested on armv8-based LS2085ARDB.
Signed-off-by: NMingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: NYork Sun <yorksun@freescale.com>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Adjust timouts and retry counts to be suitable for loaded ethernet
network. With 5 seconds timeout, 10 retries maximum, tftp is
impossible even on local network with single full-speed TCP
connection.

100msec timeout should be suitable for most networks tftp is used on,
that is local ethernets. Timeout count really needs to be way higher,
as lost packets are normal when TCP is running over the same network.

Enforce 10msec minimum.
Signed-off-by: NPavel Machek <pavel@denx.de>
Acked-by: NJoe Hershberger <joe.hershberger@ni.com>

Also move the spi flash configurations to the at91-sama5_common.h.

Current at91 zImage size is about 3.3M, the old mapping is not
suitable. So update the spi flash map as following:
	0x0      ~ 0x004000: at91bootstrap(16k)
	0x04000  ~ 0x008000: u-boot env(16k)
	0x08000  ~ 0x060000: u-boot(352k)
	0x60000  ~ 0x06c000: dtb (48k)
	0x6c000  ~ 0x400000: kernel (3M+592k)

In AT91Bootstrap, the U-Boot in spi flash also update to 0x8000, refer
to following commit in AT91Bootstrap:
	3e91e54 Kconfig: fix spi flash address

So also update SPL's u-boot load address to 0x8000 in spi flash.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>
Reviewed-by: NJagan Teki <jteki@openedev.com>

As all sama5 nandflash env configurations are same, so move them to
at91-sama5_common.h.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>