- 12 7月, 2016 12 次提交
-
-
由 Vanessa Maegima 提交于
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option, we should better use imx_ddr_size() function, which automatically determines the RAM size. Signed-off-by: NVanessa Maegima <vanessa.maegima@nxp.com>
-
由 Vanessa Maegima 提交于
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option, we should better use imx_ddr_size() function, which automatically determines the RAM size. Signed-off-by: NVanessa Maegima <vanessa.maegima@nxp.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
-
由 Vanessa Maegima 提交于
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option, we should better use imx_ddr_size() function, which automatically determines the RAM size. Signed-off-by: NVanessa Maegima <vanessa.maegima@nxp.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
-
由 Gilles Chanteperdrix 提交于
Signed-off-by: NGilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
-
由 Vanessa Maegima 提交于
Instead of passing the total RAM size via PHYS_SDRAM_SIZE option, we should better use imx_ddr_size() function, which automatically determines the RAM size. Signed-off-by: NVanessa Maegima <vanessa.maegima@nxp.com> Acked-by: NFabio Estevam <fabio.estevam@nxp.com>
-
由 Stefano Babic 提交于
Add Phytec-i.MX6 SOM with NAND Support: - 1GB RAM - Ethernet - SPI-NOR Flash - NAND (1024 MB) - external SD - UART Signed-off-by: NStefano Babic <sbabic@denx.de> Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
-
由 Stefano Babic 提交于
Custom Board based on MX6 Dual, 1GB RAM and eMMC. There are two variants of the board with and without PCIe (ZC5202 and ZC5601). Signed-off-by: NStefano Babic <sbabic@denx.de>
-
由 Hannes Schmelzer 提交于
If MAC is directly connected to another MAC (like a switch for example) we don't need to probe for a phy, autoneogation and so on. We simply have to setup speed. Signed-off-by: NHannes Schmelzer <oe5hpm@oevsv.at> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Stefano Babic 提交于
On some boards, the current 20ms timeout is hit. Increase it to 40mS. Signed-off-by: NStefano Babic <sbabic@denx.de>
-
由 Christopher Spinrath 提交于
Old revisions of Utilite (based on cm-fx6) do not have a dedicated card detect pin. But the card is removable by the user and card detection can be realized with polling (e.g. supported by Linux). Add the broken-cd property to the mmc device tree instead of the non-removable property to make card detection possible if polling is supported. Signed-off-by: NChristopher Spinrath <christopher.spinrath@rwth-aachen.de> Acked-by: NNikita Kiryanov <nikita@compulab.co.il>
-
由 Petr Kulhavy 提交于
spl_boot_mode() returned MMCSD_MODE_RAW on MMC if CONFIG_SPL_EXT_SUPPORT was configured. EXTFS is the default filesystem selected in imx6_spl.h and the function should return MMCSD_MODE_FS instead. Fix this and return MMCSD_MODE_FS instead in such cases. Signed-off-by: NPetr Kulhavy <brain@jikos.cz> CC: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com>
-
由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
-
- 11 7月, 2016 3 次提交
-
-
由 Andre Przywara 提交于
Since we lack information about the DRAM initialization for the Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit involved at the moment. Add a README file to explain the process. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NTom Rini <trini@konsulko.com> [trini: Move to board/sunxi/ from doc/] Signed-off-by: NTom Rini <trini@konsulko.com>
-
由 Stefano Babic 提交于
Because a gpimage cannot be detected, a false GP header is printed instead of checking for further image types. Move gpimage as last to be linked, letting check all other image types and printing a GP header just in case no image is detected. Signed-off-by: NStefano Babic <sbabic@denx.de>
-
由 jk.kernel@gmail.com 提交于
It's easier to Cc rockchip maintainers on rockchip-releated patches. Signed-off-by: Njk <jk.kernel@gmail.com>
-
- 09 7月, 2016 6 次提交
-
-
由 Mingkai Hu 提交于
For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is set. The SMPEN bit should be set before enabling the data cache. If not enabled, the cache is not coherent with other cores and data corruption could occur. For A57/A72, SMPEN bit enables the processor to receive instruction cache and TLB maintenance operations broadcast from other processors in the cluster. This bit should be set before enabling the caches and MMU, or performing any cache and TLB maintenance operations. Signed-off-by: NMingkai Hu <mingkai.hu@nxp.com> Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
-
由 Daniel Schwierzeck 提交于
Some archs like MIPS or PPC have a different 'bdinfo' output than ARM regarding the memory configuration. Also support 'memstart = 0x*' in u_boot_utils.find_ram_base() to make all tests requiring the RAM base working on those archs. Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: NStephen Warren <swarren@nvidia.com>
-
由 Stephen Warren 提交于
Prior to this patch, any VT100 codes emitted by U-Boot are considered part of a command's output, which often causes tests to fail. For example, test_env_echo_exists executes printenv, and then considers any text on a line before an = sign as a valid U-Boot environment variable name. This includes any VT100 codes emitted. When the test later attempts to use that variable, the name would be invalid since it includes the VT100 codes. Solve this by stripping VT100 codes from the match buffer, so they are never seen by higher level test code. The codes are still logged unmodified, so that users can expect U-Boot's exact output without interference. This does clutter the log file a bit. However, it allows users to see exactly what U-Boot emitted rather than a modified version, which hopefully is better for debugging. It's also much simpler to implement, since logging happens as soon as text is received, and so stripping the VT100 codes from the log would require handling reception and stripping of partial VT100 codes. Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Alexander Graf 提交于
Commit e6777248 (arm: Fix setjmp) added code to fix compilation of the setjmp code path with thumv1. Unfortunately it missed a constraint that the adr instruction can only refer to 4 byte aligned offsets. So this patch adds the required alignment hooks to make compilation work again even when setjmp doesn't happen to be 4 byte aligned. Signed-off-by: NAlexander Graf <agraf@suse.de> Tested-by: NTom Rini <trini@konsulko.com>
-
由 Andre Przywara 提交于
As printf calls may be executed quite early, we should avoid using any BSS stored variables, since some boards put BSS in DRAM, which may not have been initialised yet. Explicitly mark those "static global" variables as belonging to the .data section, to keep tiny-printf clear of any BSS usage. Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
-
由 Stephen Warren 提交于
Some CONFIG_ variables were recently renamed, but test/py wasn't updated to match. This causes some tests to be skipped. Fix test/py so the tests are run. Fixes: 11636258 ("Rename reset to sysreset") Fixes: f1f9d4fa ("hush: complete renaming CONFIG_SYS_HUSH_PARSER to CONFIG_HUSH_PARSER") Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 08 7月, 2016 1 次提交
-
-
由 Mateusz Kulikowski 提交于
MMC core expects (now) valid mmc->dev pointer. During conversion in commit cffe5d86 not every driver was updated. This patch fixes crash while accessing MMC on boards using Qualcomm SDHCI controller. Signed-off-by: NMateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: NSimon Glass <sjg@chromium.org>
-
- 07 7月, 2016 4 次提交
-
-
-
由 York Sun 提交于
Commit 92623672 moves USB errata workaround into a C file. This causes compiling error for kmcoge4 and kmlion1. To enable the errata workaround, define CONFIG_USB_EHCI_FSL in common header. Signed-off-by: NYork Sun <york.sun@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Ed Swarthout <Ed.Swarthout@nxp.com> Cc: Sriram Dash <sriram.dash@nxp.com> Fixes: 92623672 ("fsl: usb: make errata function common for PPC and ARM")
-
-
-
- 06 7月, 2016 14 次提交
-
-
由 Oleksandr Tymoshenko 提交于
Return value of rtl_send_common propogates unmodified all the way up to eth_send and further to API consumer if CONFIG_API is enabled. Previously rtl_send_common returned number of bytes sent on success which was erroneouly detected as error condition by API consumers that checked for operation success by comparing return value with 0. Switch rtl_send_common to use common convention: return 0 on success and negative value for failure. Cc: Stephen Warren <swarren@nvidia.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: NOleksandr Tymoshenko <gonzo@bluezbox.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Ralf Hubert 提交于
This patch fixes incorrect RPC packet layout caused by 'long' type size difference on 64 and 32-bit architectures. Signed-off-by: NRalf Hubert <r.hubert@technisat.de> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Mingkai Hu 提交于
This patch adds support for aquantia AQR106/107 PHY. Signed-off-by: NMingkai Hu <mingkai.hu@nxp.com> Signed-off-by: NGong Qianyu <Qianyu.Gong@nxp.com> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Alexey Brodkin 提交于
Commit 90b7fc92 "net: designware: support phy reset device-tree bindings" made DW GMAC driver dependent on DM_GPIO by unconditional usage of purely DM_GPIO stuff like: * dm_gpio_XXX() * gpio_request_by_name() But since that driver as of today might be easily used without DM_GPIO (that's the case for Synopsys AXS10x boards) we're shielding all DM_GPIO things by ifdefs. Signed-off-by: NAlexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Sonic Zhang <sonic.zhang@analog.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: NSimon Glass <sjg@chromium.org> Acked-by: NJoe Hershberger <joe.hershberger@ni.com>
-
由 Joe Hershberger 提交于
We want people using errnos for errors instead of -1, so make it easy by always including the definition of all the errnos. Signed-off-by: NJoe Hershberger <joe.hershberger@ni.com> Reviewed-by: NBin Meng <bmeng.cn@gmail.com>
-
由 Simon Glass 提交于
We have driver-model drivers for some of these now, so drop them. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Simon Glass 提交于
This seems to give the best performance, so let's use it always. Signed-off-by: NSimon Glass <sjg@chromium.org> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Simon Glass 提交于
We have standard drivers for panels and backlights which can do most of the work for us. Move the tegra20 LCD driver over to use those instead of custom code. This patch includes device tree changes for the nvidia boards. I have only been able to test seaboard. If this patch is applied, these boards will also need to be synced with the kernel, and updated to use display-timings: - colibri - medcom-wide - paz00 - tec Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Simon Glass 提交于
Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Simon Glass 提交于
The pmic framework uses errno_str() and this requires board that use it to enable CONFIG_ERRNO_STR to avoid a build error. Update the header to provide a NULL error message when CONFIG_ERRNO_STR is not defined, and fix the build error. This will show as "(null)" when U-Boot prints it. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Simon Glass 提交于
Bring in a copyright for this file from cmd/pmic.c since this file was submitted by the same author at around the same time. Also fix the missing header guard. Signed-off-by: NSimon Glass <sjg@chromium.org> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
On recent SoCs, tegra_pcie_phy_enable() isn't called; but instead tegra_pcie_enable_controller() calls tegra_xusb_phy_enable(). However, part of tegra_pcie_phy_enable() needs to happen in all cases. Move that code to tegra_pcie_port_enable() instead. For reference, NVIDIA's downstream Linux kernel performs this operation in tegra_pcie_enable_rp_features(), which is called immediately after tegra_pcie_port_enable(). Since that function doesn't exist in the U-Boot driver, we'll just add it to the tail of tegra_pcie_port_enable() instead. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Stephen Warren 提交于
The value that should be programmed into the PADS_REFCLK register varies per SoC. Fix the Tegra PCIe driver to program the correct values. Future SoCs will require different values in cfg0/1, so the two values are stored separately in the per-SoC data structures. For reference, the values are all documented in NV bug 1771116 comment 20. The Tegra210 value doesn't match the current TRM, but I've filed a bug to get the TRM fixed. Earlier TRMs don't document the value this register should contain, but the ASIC team has validated all these values, except for the Tegra20 value which is simply left unchanged in this patch. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NTom Warren <twarren@nvidia.com>
-
由 Sjoerd Simons 提交于
Waiting 30 seconds for the hpd to go high seems a bit much, especially on headless boots. Lowering the timeout to 300ms. Sending as RFC because frankly i don't know what a sensible timeout is here, but 30 seconds is clearly not it :) Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: NSimon Glass <sjg@chromium.org> Dropped RFC tag: Signed-off-by: NSimon Glass <sjg@chromium.org>
-