- 26 5月, 2022 9 次提交
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由 Sean Anderson 提交于
This driver depends on PCI. Update the Kconfig accordingly. Signed-off-by: NSean Anderson <sean.anderson@seco.com> Reviewed-by: NTim Harvey <tharvey@gateworks.com> Reviewed-by: NStefan Roese <sr@denx.de> Reviewed-by: NRamon Fried <rfried.dev@gmail.com>
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由 Heinrich Schuchardt 提交于
Testing with mksquasshfs 4.5.1 results in an error ValueError: could not convert string to float: '4.5.1' Version 4.10 would be considered to be lower than 4.4. Fixes: 04c9813e ("test/py: rewrite common tools for SquashFS tests") Signed-off-by: NHeinrich Schuchardt <heinrich.schuchardt@canonical.com>
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由 Wasim Khan 提交于
Update MAINTAINERS List for LS2088ARDB and LS2088AQDS platforms Signed-off-by: NWasim Khan <wasim.khan@nxp.com>
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由 Georgi Vlaev 提交于
Since commit dffdb1f8 ("board: ti: am64x: Use fdt functions for ram and bank init") ddr_init() and dram_bank_init() have switched to fdtdec for getting the memory configuration from the am64xx dts files instead of using hardcoded values. This requires an accessible memory node in SPL as we already have in k3-am642-r5-evm.dts. Make the memory node accessible in A53 SPL for both am642-sk and am642-evm and in am642-sk R5 SPL. Signed-off-by: NGeorgi Vlaev <g-vlaev@ti.com> Reviewed-by: NTom Rini <trini@konsulko.com>
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由 Joel Stanley 提交于
Add the rest of the ASPEED drivers that are in tree. Most are obvious, except for ftgmac100 which matches the register layout used in the ASPEED SoC. I am the Linux maintainer for the ASPEED kernel port, and help maintain the fork of u-boot used for OpenBMC, so add myself as a reviewer so I can stay informed about u-boot changes. Signed-off-by: NJoel Stanley <joel@jms.id.au> Reviewed-by: NChia-Wei Wang <chiawei_wang@aspeedtech.com>
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由 Andrea zi0Black Cappa 提交于
This patch mitigates the vulnerability identified via CVE-2019-14196. The previous patch was bypassed/ineffective, and now the vulnerability is identified via CVE-2022-30767. The patch removes the sanity check introduced to mitigate CVE-2019-14196 since it's ineffective. filefh3_length is changed to unsigned type integer, preventing negative numbers from being used during comparison with positive values during size sanity checks. Signed-off-by: NAndrea zi0Black Cappa <zi0Black@protonmail.com>
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由 Bin Meng 提交于
Use test_part_types as the name instead of dm_compact. Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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由 Bin Meng 提交于
Use test_fstypes as the name instead of test_dm_compact. Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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由 Bin Meng 提交于
Reset the console timeout value as some tests may change its default value during the execution. This fixes the random case timeout issue seen in the U-Boot CI. Signed-off-by: NBin Meng <bmeng.cn@gmail.com>
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- 25 5月, 2022 2 次提交
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https://source.denx.de/u-boot/custodians/u-boot-microblaze由 Tom Rini 提交于
Xilinx changes for v2022.07-rc4 zynqmp: - Fix DP PLL configuration for zcu102/zcu106 and SOM - Fix split mode for starting R5s - DT fixes - Remove firmware node for mini configurations - Wire TEE for multi DTB fit image xilinx: - Handle board_get_usable_ram_top(0) properly phy: - Extend psgtr timeout mmc: - Fix mini configuration which misses zynqmp_pm_is_function_supported()
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https://source.denx.de/u-boot/custodians/u-boot-sunxi由 Tom Rini 提交于
The bulk of it is (finally!) some DT sync from the kernel. We refrained from syncing one incompatible change, as this would spoil booting Linux kernels before v5.13 with U-Boot's DT (via UEFI, for instance). I test booted Linux v5.18 and v5.4 with that new DT on some boards, and the headless peripherals (MMC, USB, Ethernet) seemed to work. The rest are fixes: - silencing missing clock warnings due to the new pinctrl driver - fixing "UART0 on PortF", allowing UART access through the SD card pins - add an F1C100s clock driver, to enable MMC support (SPI comes later) - some cleanups for CONS_INDEX_n in Kconfig Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and OrangePi-Zero.
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- 24 5月, 2022 16 次提交
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由 Michal Simek 提交于
Fix TEE wiring when MULTI_DTB is selected. Signed-off-by: NMichal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c8523a89d910ae6b8a9971b4e7b3bda89be3dc27.1652874088.git.michal.simek@amd.com
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https://gitlab.denx.de/u-boot/custodians/u-boot-socfpga由 Tom Rini 提交于
- Add the terasic de10-standard board
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由 Samuel Holland 提交于
These were only ever implied by sunxi platforms, and that usage has been removed. Current practice is to specify CONFIG_CONS_INDEX in each board's defconfig. Signed-off-by: NSamuel Holland <samuel@sholland.org> Reviewed-by: NTom Rini <trini@konsulko.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
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由 Samuel Holland 提交于
ARCH_SUNXI selects DM_SERIAL, so the condition can never be satisfied. Signed-off-by: NSamuel Holland <samuel@sholland.org> Reviewed-by: NAndre Przywara <andre.przywara@arm.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
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由 Andre Przywara 提交于
When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSamuel Holland <samuel@sholland.org>
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由 Andre Przywara 提交于
Some devices enumerate various clocks in their DT, and many drivers just blanketly try to enable all of them. This creates problems since we only model a few gate clocks, and the clock driver outputs a warning when a clock is not described: ========= sunxi_set_gate: (CLK#3) unhandled ========= Some clocks don't have an enable bit, or are already enabled in a different way, so we might want to just ignore them. Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define a GATE_DUMMY macro that can be used in the clock description array. Define a few clocks, used by some pinctrl devices, that way to suppress the runtime warnings. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSamuel Holland <samuel@sholland.org>
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由 Andre Przywara 提交于
The introduction of the DM pinctrl driver made its probe function enable all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and variations) gate clock. Also CLK_PLL_PERIPH0 is used by the R_CCU device. So far we didn't describe those clocks in our clock driver. As we enable them already in the SPL, the devices happen to work, but the clock driver still complains about not finding those clocks: ========= sunxi_set_gate: (CLK#58) unhandled ========= Add the one-liners that are needed to announce the gate bit for those clocks, to silence that message on the console. Signed-off-by: NAndre Przywara <andre.przywara@arm.com> Reviewed-by: NSamuel Holland <samuel@sholland.org>
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由 Samuel Holland 提交于
H6 is from the sun50i family, not sun6i. Signed-off-by: NSamuel Holland <samuel@sholland.org> Reviewed-by: NHeinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
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由 Samuel Holland 提交于
Now that the pinmux conflict is handled in the board code (by skipping setup for the one conflicting MMC controller), the driver does not need to be entirely disabled based on the UART pinmux. Signed-off-by: NSamuel Holland <samuel@sholland.org> Reviewed-by: NPeng Fan <peng.fan@nxp.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
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由 Samuel Holland 提交于
Currently, selecting UART0_PORT_F entirely disables MMC support on sunxi platforms. But this is a bigger hammer then needed. Muxing UART0 to the pins on port F only causes a conflict with MMC0, so minimize the impact by specifically skipping MMC0 init. We can continue to use MMC1/2 if those are enabled. Let's also remove the preprocessor check while refacting this function. Signed-off-by: NSamuel Holland <samuel@sholland.org> Reviewed-by: NAndre Przywara <andre.przywara@arm.com> Signed-off-by: NAndre Przywara <andre.przywara@arm.com>
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由 Tom Rini 提交于
Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Humberto Naves 提交于
Use the de10-nano files as templates for the de10-standard board. The files in qts directory are generated by quartus from the GHRD design. Signed-off-by: NHumberto Naves <hsnaves@gmail.com> Reviewed-by: NMarek Vasut <marex@denx.de>
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由 Tom Rini 提交于
Rsync all defconfig files using moveconfig.py Signed-off-by: NTom Rini <trini@konsulko.com>
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由 Tom Rini 提交于
- Fix PowerPC NOR booting, important SPI uclass fixes/updates, gic_v2 fix when CPU is not in EL3, fsl_esdhc_spl fix, and squashfs fix for linking on some architectures, and fix phy_string_for_interface
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由 Tim Harvey 提交于
commit ffb0f6f4 ("treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA") broke the phy_string_for_interface function. Fix it. Fixes ffb0f6f4 ("treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA") Signed-off-by: NTim Harvey <tharvey@gateworks.com> Cc: Marek Behún <marek.behun@nic.cz> Cc: Stefan Roese <sr@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: NStefan Roese <sr@denx.de> Reviewed-by: NMarek Behún <marek.behun@nic.cz> Reviewed-by: NRamon Fried <rfried.dev@gmail.com>
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- 23 5月, 2022 13 次提交
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由 Eddie James 提交于
Add the tpm2_tis_i2c driver that should support any TPMv2 compliant I2C chips, such as the NPCT75X chip. [Ilias rename priv_auto_alloc_size to priv_auto] Signed-off-by: NEddie James <eajames@linux.ibm.com> Reviewed-by: NJoel Stanley <joel@jms.id.au> Reviewed-by: NIlias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: NIlias Apalodimas <ilias.apalodimas@linaro.org>
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由 Pali Rohár 提交于
Commit 0980cbba ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy support") changed number of sectors which are read but did not adjusted error check. Fix it and check for if correct number of sectors were read. Fixes: 0980cbba ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy support") Signed-off-by: NPali Rohár <pali@kernel.org> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com>
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由 Sai Pavan Boddu 提交于
This would prevent configuring non-secure regs in case gic security extensions are not emulated in Qemu. Signed-off-by: NSai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@amd.com>
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由 Patrice Chotard 提交于
In case _spi_get_bus_and_cs()'s parameters drv_name and dev_name are respectively set to NULL and 0, use spi_get_bus_and_cs() instead. Signed-off-by: NPatrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Behun <marek.behun@nic.cz> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: "Pali Rohár" <pali@kernel.org> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Anji J <anji.jagarlmudi@nxp.com> Cc: Biwen Li <biwen.li@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
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由 Patrice Chotard 提交于
Now, spi_flash_probe_bus_cs() relies on DT for spi speed and mode and logically calls spi_get_bus_and_cs(). In case spi mode and speed are not read from DT, make usage of spi_flash_probe() instead. To sum-up: - Previous call tree was: spi_flash_probe() -> spi_flash_probe_bus_cs() -> spi_get_bus_and_cs() - Current call tree is: spi_flash_probe() -> _spi_get_bus_and_cs() spi_flash_probe_bus_cs() -> spi_get_bus_and_cs() This patch impacts the following : - cmd/sf.c: if spi mode and/or speed is passed in argument of do_spi_flash_probe(), call spi_flash_probe() otherwise call spi_flash_probe_bus_cs(). - drivers/net/fm/fm.c: as by default spi speed and mode was set to 0 and a comment indicates that speed and mode are read from DT, use spi_flash_probe_bus_cs(). - drivers/net/pfe_eth/pfe_firmware.c: spi speed and mode are not read from DT by all platforms using this driver, so keep legacy and replace spi_flash_probe_bus_cs() by spi_flash_probe(); - drivers/net/sni_netsec.c : spi speed and mode are not read from DT, so replace spi_flash_probe_bus_cs() by spi_flash_probe(). - drivers/usb/gadget/max3420_udc.c: Can't find any platform which make usage of this driver, nevertheless, keep legacy and replace spi_get_bus_and_cs() by _spi_get_bus_and_cs(). - env/sf.c: a comment indicates that speed and mode are read from DT. So use spi_flash_probe_bus_cs(). Signed-off-by: NPatrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Behun <marek.behun@nic.cz> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: "Pali Rohár" <pali@kernel.org> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Anji J <anji.jagarlmudi@nxp.com> Cc: Biwen Li <biwen.li@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
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由 Patrice Chotard 提交于
Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs(). Add new spi_get_bus_and_cs() implementation which rely on DT for speed and mode and don't need any drv_name nor dev_name parameters. This will prepare the ground for next patch. Update all callers to use _spi_get_bus_and_cs() to keep the same behavior. Signed-off-by: NPatrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Behun <marek.behun@nic.cz> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: "Pali Rohár" <pali@kernel.org> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Pratyush Yadav <p.yadav@ti.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Anji J <anji.jagarlmudi@nxp.com> Cc: Biwen Li <biwen.li@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
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由 Pali Rohár 提交于
mpc85xx NOR binary contains also reset vector and therefore option CONFIG_MPC85XX_HAVE_RESET_VECTOR must be defined. When build system uses binman, it takes care of constructing final image which consist of u-boot-without-reset-vector, DTB and reset-vector. CONFIG_OF_EMBED does not use binman, there is no external DTB and Makefile produce directly final u-boot.bin binary. So in this case mpc85xx reset vector must not be stripped from the final u-boot.bin binary. Fix it. Signed-off-by: NPali Rohár <pali@kernel.org>
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由 Pali Rohár 提交于
Commit e8c0e006 ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support") fixed SD card booting on mpc85xx boards but broke NOR booting on these boards. Reason is that U-Boot build system for NOR images uses binman and this binman ignores alignment defined in linker script. Instead it has own config file where is alignment defined. Fix binman alignment for mpc85xx boards to match what is _now_ defined in linker script. This change fixes building of U-Boot for NOR booting on P2020 board. Fixes: e8c0e006 ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support") Signed-off-by: NPali Rohár <pali@kernel.org>
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由 Sean Nyekjaer 提交于
When compling for x86: ld.bfd: fs/squashfs/sqfs.o: in function `sqfs_read': u-boot/fs/squashfs/sqfs.c:1443: undefined reference to `__udivmoddi4' ld.bfd: u-boot/fs/squashfs/sqfs.c:1521: undefined reference to `__udivmoddi4' Signed-off-by: NSean Nyekjaer <sean.nyekjaer.ext@siemensgamesa.com> Reviewed-by: NMiquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: NPali Rohár <pali@kernel.org>
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由 Eddie James 提交于
Requesting the locality uses the timeout values, so they need to be set beforehand. Signed-off-by: NEddie James <eajames@linux.ibm.com> Reviewed-by: NIlias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: NJoel Stanley <joel@jms.id.au> Signed-off-by: NIlias Apalodimas <ilias.apalodimas@linaro.org>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx由 Tom Rini 提交于
u-boot-imx-20220523 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087 Additionally to u-boot-imx20200520: - DH MX8MP - i.MX GPIO: reading GPIO when direction is output - Menlo i.MX53: switch to DM And from u-boot-imx20200520: - fix Verdin hang - add pca9450 regulator - conversion to DM_SERIAL - NAND block handling - fix crypto - enable cache on some boards - add ACC board (MX6)
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由 Marek Vasut 提交于
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board. Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD, SPI NOR and USB 3.0 host. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
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由 Christoph Fritz 提交于
Add support for reading GPIO pin value when function is output. With this patch applied, gpio toggle command is working. Signed-off-by: NChristoph Fritz <chf.fritz@googlemail.com> Reviewed-by: NPeng Fan <peng.fan@nxp.com> Reviewed-by: NFabio Estevam <festevam@denx.de>
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