- 12 5月, 2017 8 次提交
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由 Paul Burton 提交于
The boston memory map isn't suited to the simple "all memory starting from 0" approach that the MIPS arch_fixup_fdt() implementation takes. Instead we need to indicate the first 256MiB of DDR from 0 and the rest from 0x90000000. Implement ft_board_setup to do that. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Paul Burton 提交于
Move the MIPS Coherence Manager (CM) Global Configuration Registers (GCRs) away from the region of the physical address space which the Boston board's parallel flash is found in, such that we can access all of flash without clobbering GCRs. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Paul Burton 提交于
Without adding a prompt for CONFIG_MIPS_CM_BASE, Kconfig doesn't allow defconfigs to set it. Provide the prompt in order to allow for that. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NDaniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Álvaro Fernández Rojas 提交于
Fixes commit a186d263, which missed including SFR NeufBox config from bmips Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
brcm,bcm63268.dtsi uses brcm,bcm6328-mc instead of brcm,bcm63268-mc Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
Shrink brcm,bcm6328-mc size to avoid overlapping with other controllers Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
Shrink brcm,bcm6328-mc size to avoid overlapping with other controllers Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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由 Álvaro Fernández Rojas 提交于
Shrink brcm,bcm6358-mc size to avoid overlapping with other controllers Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com>
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- 11 5月, 2017 32 次提交
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git://git.denx.de/u-boot-rockchip由 Tom Rini 提交于
This adds a new firefly-rk3399 board, MIPI support for rk3399 and rk3288, rk818 pmic support, mkimage improvements for rockchip and a few other things.
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由 Eric Gao 提交于
Add mipi dsi configuration for evb-rk3288 device tree. Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Eric Gao 提交于
Add grf register define for rk3288 mipi dsi Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Eric Gao 提交于
Add mipi dsi configs for rk3399 evb board Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Eric Gao 提交于
Add dts config for mipi display, include vop, mipi controller, panel, backlight . And Enable rk808 for lcd_3v3 in another patch. Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Eric Gao 提交于
Enable pwm0 for display of rk3399 evb board. The PWM do not have decicated interrupt number in dts and can not get periph_id by pinctrl framework. So init them here. Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Eric Gao 提交于
plat->size here is used to reserve frame buffer space befor relocation. our mipi panel use 24 bitwidth, and vop require 32bit align. So the frame buffer size should be at least 1920*1200*32/8. Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Eric Gao 提交于
Because the bitwidth is different for different display mode, so we need to set them according to demand. Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Eric Gao 提交于
Add mipi display mode for rk3399 vop, so that we can use mipi panel for display. Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Eric Gao 提交于
It's caused by the difference of clk_set_rate function implement between rk3288 andd rk3399. clk_set_rate() of rk3288 return 0 in normal condition. clk_set_rate() of rk3399 return input parameter in normal condition. So check clk_set_rate's return value by IS_ERR_VALUE. Signed-off-by: NEric Gao <eric.gao@rock-chips.com>
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由 Eric Gao 提交于
Add basic driver for mipi display on rockchip soc platform. Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Eric Gao 提交于
Add GRF register declaration for mipi dsi. Signed-off-by: NEric Gao <eric.gao@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
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由 Jacob Chen 提交于
Since this driver can be used for rk8xx series pmic, let's rename rk808 to rk8xx, to make it clear. Configs parts are done by sed -i "s/RK808/RK8XX/g" `grep RK808 -lr ./` Signed-off-by: NJacob Chen <jacob-chen@iotwrt.com>
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由 Jacob Chen 提交于
Add support for the rk818 regulator. The regulator module consists of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to power OTG and HDMI5V. Signed-off-by: NJacob Chen <jacob-chen@iotwrt.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jacob Chen 提交于
Using mask is more flexible than bits. Signed-off-by: NJacob Chen <jacob-chen@iotwrt.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jacob Chen 提交于
The RK818 chip is a Power Management IC (PMIC) for multimedia and handheld devices. For boards use rk818, the input current should be set in the early stage, before ddr initialization. Signed-off-by: NJacob Chen <jacob-chen@iotwrt.com>
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由 Jacob Chen 提交于
Both RK808 and RK818 chips are using a similar register map, so we can reuse them. I have also add reg prefix to exist registers, to keep them same style. Signed-off-by: NJacob Chen <jacob-chen@iotwrt.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jonas Karlman 提交于
Set ethernet mac address in late init for Tinker Board, prevents getting a random mac address each boot. Read mac address from eeprom, first 6 bytes from m24c08@50. Same as /etc/init.d/rockchip.sh on Tinker OS. Signed-off-by: NJonas Karlman <jonas@kwiboo.se> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Jonas Karlman 提交于
Signed-off-by: NJonas Karlman <jonas@kwiboo.se> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
To add HDMI support for the RK3399, this commit provides the needed pinctrl functionality to configure the HDMI I2C pins (used for reading the screen's EDID). Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
This allows requests (via the DTS) for PCLK_HDMI_CTRL/PCLK_VIO_GRF, which are clock gates in the HDMI output path for the RK3399. As these are enabled by default (i.e. after reset), we don't implement any logic to actively open/close these clock gates and simply assume that their reset-default has not been changed. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
With the RK3399 DRAM controller (DMC) driver providing all the infrastructure, retrieve the DRAM size from the DMC init in the board-specific code (instead of hard-coding) for the RK3399-Q7 (Puma). Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Philipp Tomsich 提交于
The (non-secure) efuse node in the DTS requests PCLK_EFUSE1024NS. To allow us to add a efuse-driver (and more importantly, to allow probes of such a driver to succeed), we need need to accept requests for PCLK_EFUSE1024NS and return a non-error result. As PCLK_EFUSE1024NS is enabled by default (i.e. after reset), we don't implement any logic to manage this clock gate and simply assume that the reset-default has not been changed. Signed-off-by: NPhilipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: NKlaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
The file is from evb-rk3399_defconfig with changes: - use rk3399-firefly dtb - re-order by make savedefconfig Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
Add test case for new interface set_invert(). Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org> Fix typo in subject and build error in sandbox_pwm_set_invert(): Signed-off-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
This is a copy from kernel. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
Rockchip pwm need to init polarity, implement pwm_set_invert() to do it. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
The latest kernel PWM drivers enable the polarity settings. When system run from U-Boot to kerenl, if there are differences in polarity set or duty cycle, the PMW will re-init: close -> set polarity and duty cycle -> enable the PWM. The power supply controled by pwm regulator may have voltage shaking, which lead to the system not stable. Signed-off-by: NElaine Zhang <zhangqing@rock-chips.com> Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
Firefly-rk3399 is a bord from T-Firefly, you can find detail about it here: http://en.t-firefly.com/en/firenow/Firefly_RK3399/ This patch add basic node for the board and make it able to bring up. Peripheral/interfaces on board: - usb hub which connect to ehci controller; - UART2 debug - eMMC - PCIe - USB 3.0 HOST, type-C port - sdio, sd-card - HDMI - Ethernet - OPTICAL - WiFi/BT - MIPI CSI/DSI - IR - EDP/DP Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org> Reviewed-by: NSimon Glass <sjg@chromium.org>
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由 Kever Yang 提交于
The kernel dts has update a lot since the first time we commit rk3399.dtsi, sync with kernel for further development. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Acked-by: NSimon Glass <sjg@chromium.org>
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由 Simon Glass 提交于
At present dtoc assumes that nodes which are phandles do not themselves reference other phandle nodes. Unfortunately this is not necessarilly true. As a result we can currently output C code which does not compile because a node declaration can be referenced before it is declared. Adjust the code to explicitly output all phandle nodes needed by node before the node itself is output. This fixes building with the latest rk3399-firefly.dts from Linux, which has reordered the nodes. Signed-off-by: NSimon Glass <sjg@chromium.org> Tested-by: NKever Yang <kever.yang@rock-chips.com>
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